Commit afdede61 authored by Sean Wang's avatar Sean Wang Committed by David S. Miller

arm64: dts: mt7622: Enlarge the SGMII register range

Enlarge the SGMII register range and using 2.5G force mode on default.
Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d438e298
...@@ -929,7 +929,8 @@ eth: ethernet@1b100000 { ...@@ -929,7 +929,8 @@ eth: ethernet@1b100000 {
sgmiisys: sgmiisys@1b128000 { sgmiisys: sgmiisys@1b128000 {
compatible = "mediatek,mt7622-sgmiisys", compatible = "mediatek,mt7622-sgmiisys",
"syscon"; "syscon";
reg = <0 0x1b128000 0 0x1000>; reg = <0 0x1b128000 0 0x3000>;
#clock-cells = <1>; #clock-cells = <1>;
mediatek,physpeed = "2500";
}; };
}; };
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