Commit b041ef0e authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v5.8/fixes-rc5-signed' of...

Merge tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.8-rc cycle

Few fixes for issues noticed during testing:

- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
  driver

- A regression fix for ti-sysc no-idle handling that caused issues
  compared to earlier platform data based booting

- A fix for memory leak for omap_hwmod_allocate_module

- Fix d_can driver probe for am437x

* tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Fix dcan driver probe failed on am437x platform
  ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
  bus: ti-sysc: Do not disable on suspend for no-idle
  bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
  bus: ti-sysc: Fix wakeirq sleeping function called from invalid context

Link: https://lore.kernel.org/r/pull-1594840100-132735@atomide.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d943a9c8 2a4117df
......@@ -1540,8 +1540,9 @@ target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
reg = <0xcc020 0x4>;
reg-names = "rev";
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
<&dcan0_fck>;
clock-names = "fck", "osc";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xcc000 0x2000>;
......@@ -1549,6 +1550,8 @@ target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
dcan0: can@0 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan0_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 0>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
......@@ -1560,8 +1563,9 @@ target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
reg = <0xd0020 0x4>;
reg-names = "rev";
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
<&dcan1_fck>;
clock-names = "fck", "osc";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xd0000 0x2000>;
......@@ -1569,6 +1573,8 @@ target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
dcan1: can@0 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan1_fck>;
clock-name = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
......
......@@ -3435,7 +3435,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
regs = ioremap(data->module_pa,
data->module_size);
if (!regs)
return -ENOMEM;
goto out_free_sysc;
}
/*
......@@ -3445,13 +3445,13 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
if (oh->class->name && strcmp(oh->class->name, data->name)) {
class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
if (!class)
return -ENOMEM;
goto out_unmap;
}
if (list_empty(&oh->slave_ports)) {
oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
if (!oi)
return -ENOMEM;
goto out_free_class;
/*
* Note that we assume interconnect interface clocks will be
......@@ -3478,6 +3478,14 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
spin_unlock_irqrestore(&oh->_lock, flags);
return 0;
out_free_class:
kfree(class);
out_unmap:
iounmap(regs);
out_free_sysc:
kfree(sysc);
return -ENOMEM;
}
static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
......
......@@ -236,15 +236,14 @@ static int sysc_wait_softreset(struct sysc *ddata)
syss_done = ddata->cfg.syss_mask;
if (syss_offset >= 0) {
error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval,
(rstval & ddata->cfg.syss_mask) ==
syss_done,
100, MAX_MODULE_SOFTRESET_WAIT);
error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
rstval, (rstval & ddata->cfg.syss_mask) ==
syss_done, 100, MAX_MODULE_SOFTRESET_WAIT);
} else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {
error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval,
!(rstval & sysc_mask),
100, MAX_MODULE_SOFTRESET_WAIT);
error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
rstval, !(rstval & sysc_mask),
100, MAX_MODULE_SOFTRESET_WAIT);
}
return error;
......@@ -1279,7 +1278,8 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
ddata = dev_get_drvdata(dev);
if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
if (ddata->cfg.quirks &
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
return 0;
return pm_runtime_force_suspend(dev);
......@@ -1291,7 +1291,8 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev)
ddata = dev_get_drvdata(dev);
if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
if (ddata->cfg.quirks &
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
return 0;
return pm_runtime_force_resume(dev);
......@@ -1728,8 +1729,8 @@ static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
local_irq_save(flags);
/* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */
error = readl_poll_timeout(ddata->module_va + 0x44, val,
!(val & BIT(0)), 100, 50);
error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
!(val & BIT(0)), 100, 50);
if (error)
dev_warn(ddata->dev, "rtc busy timeout\n");
/* Now we have ~15 microseconds to read/write various registers */
......
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