Commit b181a1e8 authored by Peter Geis's avatar Peter Geis Committed by Heiko Stuebner

arm64: dts: rockchip: enable sfc controller on Quartz64 Model A

Add the sfc controller binding for the Quartz64 Model A. This is not
populated by default, so leave it disabled.
Signed-off-by: default avatarPeter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220511150117.113070-7-pgwipeout@gmail.comSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 28ae8a98
......@@ -617,6 +617,22 @@ &sdmmc1 {
status = "okay";
};
&sfc {
pinctrl-0 = <&fspi_pins>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/* spdif is exposed on con40 pin 18 */
&spdif {
status = "okay";
......
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