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Commit b242a602 authored by Paul Mackerras's avatar Paul Mackerras
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Merge branch 'linux-2.6'

parents e1fd1865 94545bad
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Showing with 6866 additions and 9735 deletions
Documentation/networking/bonding.txt
View file @ b242a602
......@@ -554,6 +554,30 @@ xmit_hash_policy
This algorithm is 802.3ad compliant.
layer2+3
This policy uses a combination of layer2 and layer3
protocol information to generate the hash.
Uses XOR of hardware MAC addresses and IP addresses to
generate the hash. The formula is
(((source IP XOR dest IP) AND 0xffff) XOR
( source MAC XOR destination MAC ))
modulo slave count
This algorithm will place all traffic to a particular
network peer on the same slave. For non-IP traffic,
the formula is the same as for the layer2 transmit
hash policy.
This policy is intended to provide a more balanced
distribution of traffic than layer2 alone, especially
in environments where a layer3 gateway device is
required to reach most destinations.
This algorithm is 802.3ad complient.
layer3+4
This policy uses upper layer protocol information,
......@@ -589,8 +613,9 @@ xmit_hash_policy
or may not tolerate this noncompliance.
The default value is layer2. This option was added in bonding
version 2.6.3. In earlier versions of bonding, this parameter does
not exist, and the layer2 policy is the only policy.
version 2.6.3. In earlier versions of bonding, this parameter
does not exist, and the layer2 policy is the only policy. The
layer2+3 value was added for bonding version 3.2.2.
3. Configuring Bonding Devices
......
MAINTAINERS
View file @ b242a602
......@@ -1681,8 +1681,7 @@ S: Maintained
HARMONY SOUND DRIVER
P: Kyle McMartin
M: kyle@parisc-linux.org
W: http://www.parisc-linux.org/~kyle/harmony/
L: parisc-linux@lists.parisc-linux.org
L: linux-parisc@vger.kernel.org
S: Maintained
HAYES ESP SERIAL DRIVER
......@@ -2173,7 +2172,7 @@ S: Maintained
KDUMP
P: Vivek Goyal
M: vgoyal@in.ibm.com
M: vgoyal@redhat.com
P: Haren Myneni
M: hbabu@us.ibm.com
L: kexec@lists.infradead.org
......@@ -2598,13 +2597,6 @@ L: https://tango.0pointer.de/mailman/listinfo/s270-linux
W: http://0pointer.de/lennart/tchibo.html
S: Maintained
MTRR AND SIMILAR SUPPORT [i386]
P: Richard Gooch
M: rgooch@atnf.csiro.au
L: linux-kernel@vger.kernel.org
W: http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
S: Maintained
MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
P: Pierre Ossman
M: drzeus-mmc@drzeus.cx
......@@ -2897,16 +2889,15 @@ W: http://www.torque.net/linux-pp.html
S: Maintained
PARISC ARCHITECTURE
P: Kyle McMartin
M: kyle@parisc-linux.org
P: Matthew Wilcox
M: matthew@wil.cx
P: Grant Grundler
M: grundler@parisc-linux.org
P: Kyle McMartin
M: kyle@parisc-linux.org
L: parisc-linux@parisc-linux.org
L: linux-parisc@vger.kernel.org
W: http://www.parisc-linux.org/
T: git kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
T: cvs cvs.parisc-linux.org:/var/cvs/linux-2.6
S: Maintained
PARAVIRT_OPS INTERFACE
......
Makefile
View file @ b242a602
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 24
EXTRAVERSION = -rc3
EXTRAVERSION = -rc4
NAME = Arr Matey! A Hairy Bilge Rat!
# *DOCUMENTATION*
......
arch/avr32/Kconfig
View file @ b242a602
......@@ -6,8 +6,7 @@
mainmenu "Linux Kernel Configuration"
config AVR32
bool
default y
def_bool y
# With EMBEDDED=n, we get lots of stuff automatically selected
# that we usually don't need on AVR32.
select EMBEDDED
......@@ -20,51 +19,49 @@ config AVR32
http://avr32linux.org/.
config GENERIC_GPIO
bool
default y
def_bool y
config GENERIC_HARDIRQS
bool
default y
def_bool y
config STACKTRACE_SUPPORT
def_bool y
config LOCKDEP_SUPPORT
def_bool y
config TRACE_IRQFLAGS_SUPPORT
def_bool y
config HARDIRQS_SW_RESEND
bool
default y
def_bool y
config GENERIC_IRQ_PROBE
bool
default y
def_bool y
config RWSEM_GENERIC_SPINLOCK
bool
default y
def_bool y
config GENERIC_TIME
bool
default y
def_bool y
config RWSEM_XCHGADD_ALGORITHM
bool
def_bool n
config ARCH_HAS_ILOG2_U32
bool
default n
def_bool n
config ARCH_HAS_ILOG2_U64
bool
default n
def_bool n
config GENERIC_HWEIGHT
bool
default y
def_bool y
config GENERIC_CALIBRATE_DELAY
bool
default y
def_bool y
config GENERIC_BUG
bool
default y
def_bool y
depends on BUG
source "init/Kconfig"
......@@ -139,28 +136,22 @@ config PHYS_OFFSET
source "kernel/Kconfig.preempt"
config HAVE_ARCH_BOOTMEM_NODE
bool
default n
def_bool n
config ARCH_HAVE_MEMORY_PRESENT
bool
default n
def_bool n
config NEED_NODE_MEMMAP_SIZE
bool
default n
def_bool n
config ARCH_FLATMEM_ENABLE
bool
default y
def_bool y
config ARCH_DISCONTIGMEM_ENABLE
bool
default n
def_bool n
config ARCH_SPARSEMEM_ENABLE
bool
default n
def_bool n
source "mm/Kconfig"
......
arch/avr32/kernel/Makefile
View file @ b242a602
......@@ -11,3 +11,4 @@ obj-y += signal.o sys_avr32.o process.o time.o
obj-y += init_task.o switch_to.o cpu.o
obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
arch/avr32/kernel/asm-offsets.c
View file @ b242a602
......@@ -21,5 +21,7 @@ void foo(void)
OFFSET(TI_flags, thread_info, flags);
OFFSET(TI_cpu, thread_info, cpu);
OFFSET(TI_preempt_count, thread_info, preempt_count);
OFFSET(TI_rar_saved, thread_info, rar_saved);
OFFSET(TI_rsr_saved, thread_info, rsr_saved);
OFFSET(TI_restart_block, thread_info, restart_block);
}
arch/avr32/kernel/entry-avr32b.S
View file @ b242a602
......@@ -264,16 +264,7 @@ syscall_exit_work:
3: bld r1, TIF_BREAKPOINT
brcc syscall_exit_cont
mfsr r3, SYSREG_TLBEHI
lddsp r2, sp[REG_PC]
andl r3, 0xff, COH
lsl r3, 1
sbr r3, 30
sbr r3, 0
mtdr DBGREG_BWA2A, r2
mtdr DBGREG_BWC2A, r3
rjmp syscall_exit_cont
rjmp enter_monitor_mode
/* The slow path of the TLB miss handler */
page_table_not_present:
......@@ -288,11 +279,16 @@ page_not_present:
rjmp ret_from_exception
/* This function expects to find offending PC in SYSREG_RAR_EX */
.type save_full_context_ex, @function
.align 2
save_full_context_ex:
mfsr r11, SYSREG_RAR_EX
sub r9, pc, . - debug_trampoline
mfsr r8, SYSREG_RSR_EX
cp.w r9, r11
breq 3f
mov r12, r8
andh r8, (MODE_MASK >> 16), COH
mfsr r11, SYSREG_RAR_EX
brne 2f
1: pushm r11, r12 /* PC and SR */
......@@ -303,10 +299,25 @@ save_full_context_ex:
stdsp sp[4], r10 /* replace saved SP */
rjmp 1b
/*
* The debug handler set up a trampoline to make us
* automatically enter monitor mode upon return, but since
* we're saving the full context, we must assume that the
* exception handler might want to alter the return address
* and/or status register. So we need to restore the original
* context and enter monitor mode manually after the exception
* has been handled.
*/
3: get_thread_info r8
ld.w r11, r8[TI_rar_saved]
ld.w r12, r8[TI_rsr_saved]
rjmp 1b
.size save_full_context_ex, . - save_full_context_ex
/* Low-level exception handlers */
handle_critical:
pushm r12
pushm r0-r12
sub sp, 4
stmts --sp, r0-lr
rcall save_full_context_ex
mfsr r12, SYSREG_ECR
mov r11, sp
......@@ -439,6 +450,7 @@ do_fpe_ll:
ret_from_exception:
mask_interrupts
lddsp r4, sp[REG_SR]
andh r4, (MODE_MASK >> 16), COH
brne fault_resume_kernel
......@@ -515,119 +527,124 @@ fault_exit_work:
2: bld r1, TIF_BREAKPOINT
brcc fault_resume_user
mfsr r3, SYSREG_TLBEHI
lddsp r2, sp[REG_PC]
andl r3, 0xff, COH
lsl r3, 1
sbr r3, 30
sbr r3, 0
mtdr DBGREG_BWA2A, r2
mtdr DBGREG_BWC2A, r3
rjmp fault_resume_user
/* If we get a debug trap from privileged context we end up here */
handle_debug_priv:
/* Fix up LR and SP in regs. r11 contains the mode we came from */
rjmp enter_monitor_mode
.section .kprobes.text, "ax", @progbits
.type handle_debug, @function
handle_debug:
sub sp, 4 /* r12_orig */
stmts --sp, r0-lr
mfsr r8, SYSREG_RAR_DBG
mfsr r9, SYSREG_RSR_DBG
unmask_exceptions
pushm r8-r9
bfextu r9, r9, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
brne debug_fixup_regs
.Ldebug_fixup_cont:
#ifdef CONFIG_TRACE_IRQFLAGS
rcall trace_hardirqs_off
#endif
mov r12, sp
rcall do_debug
mov sp, r12
lddsp r2, sp[REG_SR]
bfextu r3, r2, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
brne debug_resume_kernel
get_thread_info r0
ld.w r1, r0[TI_flags]
mov r2, _TIF_DBGWORK_MASK
tst r1, r2
brne debug_exit_work
bld r1, TIF_SINGLE_STEP
brcc 1f
mfdr r4, OCD_DC
sbr r4, OCD_DC_SS_BIT
mtdr OCD_DC, r4
1: popm r10,r11
mask_exceptions
mtsr SYSREG_RSR_DBG, r11
mtsr SYSREG_RAR_DBG, r10
#ifdef CONFIG_TRACE_IRQFLAGS
rcall trace_hardirqs_on
1:
#endif
ldmts sp++, r0-lr
sub sp, -4
retd
.size handle_debug, . - handle_debug
/* Mode of the trapped context is in r9 */
.type debug_fixup_regs, @function
debug_fixup_regs:
mfsr r8, SYSREG_SR
mov r9, r8
andh r8, hi(~MODE_MASK)
or r8, r11
mov r10, r8
bfins r8, r9, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
mtsr SYSREG_SR, r8
sub pc, -2
stdsp sp[REG_LR], lr
mtsr SYSREG_SR, r9
mtsr SYSREG_SR, r10
sub pc, -2
sub r10, sp, -FRAME_SIZE_FULL
stdsp sp[REG_SP], r10
mov r12, sp
rcall do_debug_priv
sub r8, sp, -FRAME_SIZE_FULL
stdsp sp[REG_SP], r8
rjmp .Ldebug_fixup_cont
.size debug_fixup_regs, . - debug_fixup_regs
/* Now, put everything back */
ssrf SR_EM_BIT
.type debug_resume_kernel, @function
debug_resume_kernel:
mask_exceptions
popm r10, r11
mtsr SYSREG_RAR_DBG, r10
mtsr SYSREG_RSR_DBG, r11
mfsr r8, SYSREG_SR
mov r9, r8
andh r8, hi(~MODE_MASK)
andh r11, hi(MODE_MASK)
or r8, r11
mtsr SYSREG_SR, r8
#ifdef CONFIG_TRACE_IRQFLAGS
bld r11, SYSREG_GM_OFFSET
brcc 1f
rcall trace_hardirqs_on
1:
#endif
mfsr r2, SYSREG_SR
mov r1, r2
bfins r2, r3, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
mtsr SYSREG_SR, r2
sub pc, -2
popm lr
mtsr SYSREG_SR, r9
mtsr SYSREG_SR, r1
sub pc, -2
sub sp, -4 /* skip SP */
popm r0-r12
sub sp, -4
retd
.size debug_resume_kernel, . - debug_resume_kernel
.type debug_exit_work, @function
debug_exit_work:
/*
* At this point, everything is masked, that is, interrupts,
* exceptions and debugging traps. We might get called from
* interrupt or exception context in some rare cases, but this
* will be taken care of by do_debug(), so we're not going to
* do a 100% correct context save here.
* We must return from Monitor Mode using a retd, and we must
* not schedule since that involves the D bit in SR getting
* cleared by something other than the debug hardware. This
* may cause undefined behaviour according to the Architecture
* manual.
*
* So we fix up the return address and status and return to a
* stub below in Exception mode. From there, we can follow the
* normal exception return path.
*
* The real return address and status registers are stored on
* the stack in the way the exception return path understands,
* so no need to fix anything up there.
*/
handle_debug:
sub sp, 4 /* r12_orig */
stmts --sp, r0-lr
mfsr r10, SYSREG_RAR_DBG
mfsr r11, SYSREG_RSR_DBG
unmask_exceptions
pushm r10,r11
andh r11, (MODE_MASK >> 16), COH
brne handle_debug_priv
mov r12, sp
rcall do_debug
lddsp r10, sp[REG_SR]
andh r10, (MODE_MASK >> 16), COH
breq debug_resume_user
debug_restore_all:
popm r10,r11
mask_exceptions
mtsr SYSREG_RSR_DBG, r11
mtsr SYSREG_RAR_DBG, r10
ldmts sp++, r0-lr
sub sp, -4
sub r8, pc, . - fault_exit_work
mtsr SYSREG_RAR_DBG, r8
mov r9, 0
orh r9, hi(SR_EM | SR_GM | MODE_EXCEPTION)
mtsr SYSREG_RSR_DBG, r9
sub pc, -2
retd
debug_resume_user:
get_thread_info r0
mask_interrupts
ld.w r1, r0[TI_flags]
andl r1, _TIF_DBGWORK_MASK, COH
breq debug_restore_all
1: bld r1, TIF_NEED_RESCHED
brcc 2f
unmask_interrupts
rcall schedule
mask_interrupts
ld.w r1, r0[TI_flags]
rjmp 1b
2: mov r2, _TIF_SIGPENDING | _TIF_RESTORE_SIGMASK
tst r1, r2
breq 3f
unmask_interrupts
mov r12, sp
mov r11, r0
rcall do_notify_resume
mask_interrupts
ld.w r1, r0[TI_flags]
rjmp 1b
3: bld r1, TIF_SINGLE_STEP
brcc debug_restore_all
mfdr r2, DBGREG_DC
sbr r2, DC_SS_BIT
mtdr DBGREG_DC, r2
rjmp debug_restore_all
.size debug_exit_work, . - debug_exit_work
.set rsr_int0, SYSREG_RSR_INT0
.set rsr_int1, SYSREG_RSR_INT1
......@@ -675,7 +692,11 @@ irq_level\level:
andl r1, _TIF_WORK_MASK, COH
brne irq_exit_work
1: popm r8-r9
1:
#ifdef CONFIG_TRACE_IRQFLAGS
rcall trace_hardirqs_on
#endif
popm r8-r9
mtsr rar_int\level, r8
mtsr rsr_int\level, r9
ldmts sp++,r0-lr
......@@ -748,3 +769,53 @@ cpu_idle_enable_int_and_exit:
IRQ_LEVEL 1
IRQ_LEVEL 2
IRQ_LEVEL 3
.section .kprobes.text, "ax", @progbits
.type enter_monitor_mode, @function
enter_monitor_mode:
/*
* We need to enter monitor mode to do a single step. The
* monitor code will alter the return address so that we
* return directly to the user instead of returning here.
*/
breakpoint
rjmp breakpoint_failed
.size enter_monitor_mode, . - enter_monitor_mode
.type debug_trampoline, @function
.global debug_trampoline
debug_trampoline:
/*
* Save the registers on the stack so that the monitor code
* can find them easily.
*/
sub sp, 4 /* r12_orig */
stmts --sp, r0-lr
get_thread_info r0
ld.w r8, r0[TI_rar_saved]
ld.w r9, r0[TI_rsr_saved]
pushm r8-r9
/*
* The monitor code will alter the return address so we don't
* return here.
*/
breakpoint
rjmp breakpoint_failed
.size debug_trampoline, . - debug_trampoline
.type breakpoint_failed, @function
breakpoint_failed:
/*
* Something went wrong. Perhaps the debug hardware isn't
* enabled?
*/
lda.w r12, msg_breakpoint_failed
mov r11, sp
mov r10, 9 /* SIGKILL */
call die
1: rjmp 1b
msg_breakpoint_failed:
.asciz "Failed to enter Debug Mode"
arch/avr32/kernel/kprobes.c
View file @ b242a602
......@@ -70,9 +70,9 @@ static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
BUG_ON(!(sysreg_read(SR) & SYSREG_BIT(SR_D)));
dc = __mfdr(DBGREG_DC);
dc |= DC_SS;
__mtdr(DBGREG_DC, dc);
dc = ocd_read(DC);
dc |= 1 << OCD_DC_SS_BIT;
ocd_write(DC, dc);
/*
* We must run the instruction from its original location
......@@ -91,9 +91,9 @@ static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
pr_debug("resuming execution at PC=%08lx\n", regs->pc);
dc = __mfdr(DBGREG_DC);
dc &= ~DC_SS;
__mtdr(DBGREG_DC, dc);
dc = ocd_read(DC);
dc &= ~(1 << OCD_DC_SS_BIT);
ocd_write(DC, dc);
*p->addr = BREAKPOINT_INSTRUCTION;
flush_icache_range((unsigned long)p->addr,
......@@ -261,7 +261,7 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
int __init arch_init_kprobes(void)
{
printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
__mtdr(DBGREG_DC, DC_MM | DC_DBE);
ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
/* TODO: Register kretprobe trampoline */
return 0;
......
arch/avr32/kernel/process.c
View file @ b242a602
......@@ -55,8 +55,8 @@ void machine_power_off(void)
void machine_restart(char *cmd)
{
__mtdr(DBGREG_DC, DC_DBE);
__mtdr(DBGREG_DC, DC_RES);
ocd_write(DC, (1 << OCD_DC_DBE_BIT));
ocd_write(DC, (1 << OCD_DC_RES_BIT));
while (1) ;
}
......@@ -287,10 +287,11 @@ void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
regs->sr & SR_N ? 'N' : 'n',
regs->sr & SR_Z ? 'Z' : 'z',
regs->sr & SR_C ? 'C' : 'c');
printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
printk("%sMode bits: %c%c%c%c%c%c%c%c%c%c\n", log_lvl,
regs->sr & SR_H ? 'H' : 'h',
regs->sr & SR_R ? 'R' : 'r',
regs->sr & SR_J ? 'J' : 'j',
regs->sr & SR_DM ? 'M' : 'm',
regs->sr & SR_D ? 'D' : 'd',
regs->sr & SR_EM ? 'E' : 'e',
regs->sr & SR_I3M ? '3' : '.',
regs->sr & SR_I2M ? '2' : '.',
......
arch/avr32/kernel/ptrace.c
View file @ b242a602
This diff is collapsed.
arch/avr32/kernel/stacktrace.c 0 → 100644
View file @ b242a602
/*
* Stack trace management functions
*
* Copyright (C) 2007 Atmel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/sched.h>
#include <linux/stacktrace.h>
#include <linux/thread_info.h>
register unsigned long current_frame_pointer asm("r7");
struct stackframe {
unsigned long lr;
unsigned long fp;
};
/*
* Save stack-backtrace addresses into a stack_trace buffer.
*/
void save_stack_trace(struct stack_trace *trace)
{
unsigned long low, high;
unsigned long fp;
struct stackframe *frame;
int skip = trace->skip;
low = (unsigned long)task_stack_page(current);
high = low + THREAD_SIZE;
fp = current_frame_pointer;
while (fp >= low && fp <= (high - 8)) {
frame = (struct stackframe *)fp;
if (skip) {
skip--;
} else {
trace->entries[trace->nr_entries++] = frame->lr;
if (trace->nr_entries >= trace->max_entries)
break;
}
/*
* The next frame must be at a higher address than the
* current frame.
*/
low = fp + 8;
fp = frame->fp;
}
}
arch/avr32/kernel/traps.c
View file @ b242a602
......@@ -39,7 +39,7 @@ void NORET_TYPE die(const char *str, struct pt_regs *regs, long err)
printk("FRAME_POINTER ");
#endif
if (current_cpu_data.features & AVR32_FEATURE_OCD) {
unsigned long did = __mfdr(DBGREG_DID);
unsigned long did = ocd_read(DID);
printk("chip: 0x%03lx:0x%04lx rev %lu\n",
(did >> 1) & 0x7ff,
(did >> 12) & 0x7fff,
......
arch/avr32/kernel/vmlinux.lds.S
View file @ b242a602
......@@ -77,10 +77,10 @@ SECTIONS
. = 0x100;
*(.scall.text)
*(.irq.text)
KPROBES_TEXT
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
KPROBES_TEXT
*(.fixup)
*(.gnu.warning)
_etext = .;
......
arch/avr32/mm/cache.c
View file @ b242a602
......@@ -122,16 +122,6 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page)
}
}
/*
* This one is used by copy_to_user_page()
*/
void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
unsigned long addr, int len)
{
if (vma->vm_flags & VM_EXEC)
flush_icache_range(addr, addr + len);
}
asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len)
{
int ret;
......@@ -159,3 +149,13 @@ asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len)
out:
return ret;
}
void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
unsigned long vaddr, void *dst, const void *src,
unsigned long len)
{
memcpy(dst, src, len);
if (vma->vm_flags & VM_EXEC)
flush_icache_range((unsigned long)dst,
(unsigned long)dst + len);
}
arch/mips/Kconfig
View file @ b242a602
......@@ -714,6 +714,10 @@ config ARCH_HAS_ILOG2_U64
bool
default n
config ARCH_SUPPORTS_OPROFILE
bool
default y if !MIPS_MT_SMTC
config GENERIC_FIND_NEXT_BIT
bool
default y
......
arch/mips/au1000/common/dbdma.c
View file @ b242a602
......@@ -859,7 +859,7 @@ dbdma_interrupt(int irq, void *dev_id)
intstat = dbdma_gptr->ddma_intstat;
au_sync();
chan_index = ffs(intstat);
chan_index = __ffs(intstat);
ctp = chan_tab_ptr[chan_index];
cp = ctp->chan_ptr;
......
arch/mips/au1000/common/irq.c
View file @ b242a602
......@@ -462,9 +462,9 @@ static void intc0_req0_irqdispatch(void)
return;
}
#endif
bit = ffs(intc0_req0);
bit = __ffs(intc0_req0);
intc0_req0 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + bit);
do_IRQ(AU1000_INTC0_INT_BASE + bit);
}
......@@ -478,9 +478,9 @@ static void intc0_req1_irqdispatch(void)
if (!intc0_req1)
return;
bit = ffs(intc0_req1);
bit = __ffs(intc0_req1);
intc0_req1 &= ~(1 << bit);
do_IRQ(bit);
do_IRQ(AU1000_INTC0_INT_BASE + bit);
}
......@@ -498,9 +498,9 @@ static void intc1_req0_irqdispatch(void)
if (!intc1_req0)
return;
bit = ffs(intc1_req0);
bit = __ffs(intc1_req0);
intc1_req0 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit);
do_IRQ(AU1000_INTC1_INT_BASE + bit);
}
......@@ -514,9 +514,9 @@ static void intc1_req1_irqdispatch(void)
if (!intc1_req1)
return;
bit = ffs(intc1_req1);
bit = __ffs(intc1_req1);
intc1_req1 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit);
do_IRQ(AU1000_INTC1_INT_BASE + bit);
}
asmlinkage void plat_irq_dispatch(void)
......
arch/mips/au1000/pb1200/irqmap.c
View file @ b242a602
......@@ -74,7 +74,7 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
bcsr->int_status = bisr;
for( ; bisr; bisr &= (bisr-1) )
{
extirq_nr = PB1200_INT_BEGIN + ffs(bisr);
extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
/* Ack and dispatch IRQ */
do_IRQ(extirq_nr);
}
......
arch/mips/oprofile/op_model_mipsxx.c
View file @ b242a602
......@@ -6,6 +6,7 @@
* Copyright (C) 2004, 05, 06 by Ralf Baechle
* Copyright (C) 2005 by MIPS Technologies, Inc.
*/
#include <linux/cpumask.h>
#include <linux/oprofile.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
......@@ -33,11 +34,45 @@
#ifdef CONFIG_MIPS_MT_SMP
#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
#define vpe_id() smp_processor_id()
/*
* The number of bits to shift to convert between counters per core and
* counters per VPE. There is no reasonable interface atm to obtain the
* number of VPEs used by Linux and in the 34K this number is fixed to two
* anyways so we hardcore a few things here for the moment. The way it's
* done here will ensure that oprofile VSMP kernel will run right on a lesser
* core like a 24K also or with maxcpus=1.
*/
static inline unsigned int vpe_shift(void)
{
if (num_possible_cpus() > 1)
return 1;
return 0;
}
#else
#define WHAT 0
#define vpe_id() 0
static inline unsigned int vpe_shift(void)
{
return 0;
}
#endif
static inline unsigned int counters_total_to_per_cpu(unsigned int counters)
{
return counters >> vpe_shift();
}
static inline unsigned int counters_per_cpu_to_total(unsigned int counters)
{
return counters << vpe_shift();
}
#define __define_perf_accessors(r, n, np) \
\
static inline unsigned int r_c0_ ## r ## n(void) \
......@@ -269,9 +304,7 @@ static int __init mipsxx_init(void)
reset_counters(counters);
#ifdef CONFIG_MIPS_MT_SMP
counters >>= 1;
#endif
counters = counters_total_to_per_cpu(counters);
op_model_mipsxx_ops.num_counters = counters;
switch (current_cpu_type()) {
......@@ -330,9 +363,8 @@ static int __init mipsxx_init(void)
static void mipsxx_exit(void)
{
int counters = op_model_mipsxx_ops.num_counters;
#ifdef CONFIG_MIPS_MT_SMP
counters <<= 1;
#endif
counters = counters_per_cpu_to_total(counters);
reset_counters(counters);
perf_irq = null_perf_irq;
......
arch/mips/pci/pci-bcm1480.c
View file @ b242a602
......@@ -76,8 +76,10 @@ static inline void WRITECFG32(u32 addr, u32 data)
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
This is b0rked.
return dev->irq;
if (pin == 0)
return -1;
return K_BCM1480_INT_PCI_INTA - 1 + pin;
}
/* Do platform specific device initialization at pci_enable_device() time */
......
arch/parisc/Makefile
View file @ b242a602
......@@ -70,7 +70,7 @@ kernel-y := mm/ kernel/ math-emu/ kernel/init_task.o
kernel-$(CONFIG_HPUX) += hpux/
core-y += $(addprefix arch/parisc/, $(kernel-y))
libs-y += arch/parisc/lib/
libs-y += arch/parisc/lib/ `$(CC) -print-libgcc-file-name`
drivers-$(CONFIG_OPROFILE) += arch/parisc/oprofile/
......
arch/parisc/kernel/firmware.c
View file @ b242a602
......@@ -1082,76 +1082,56 @@ void pdc_io_reset_devices(void)
/**
* pdc_iodc_putc - Console character print using IODC.
* @c: the character to output.
* pdc_iodc_print - Console print using IODC.
* @str: the string to output.
* @count: length of str
*
* Note that only these special chars are architected for console IODC io:
* BEL, BS, CR, and LF. Others are passed through.
* Since the HP console requires CR+LF to perform a 'newline', we translate
* "\n" to "\r\n".
*/
void pdc_iodc_putc(unsigned char c)
int pdc_iodc_print(unsigned char *str, unsigned count)
{
/* XXX Should we spinlock posx usage */
static int posx; /* for simple TAB-Simulation... */
static int __attribute__((aligned(8))) iodc_retbuf[32];
static char __attribute__((aligned(64))) iodc_dbuf[4096];
unsigned int n;
/* XXX Should we spinlock posx usage */
static int posx; /* for simple TAB-Simulation... */
int __attribute__((aligned(8))) iodc_retbuf[32];
char __attribute__((aligned(64))) iodc_dbuf[4096];
unsigned int i;
unsigned long flags;
switch (c) {
case '\n':
iodc_dbuf[0] = '\r';
iodc_dbuf[1] = '\n';
n = 2;
posx = 0;
break;
case '\t':
pdc_iodc_putc(' ');
while (posx & 7) /* expand TAB */
pdc_iodc_putc(' ');
return; /* return since IODC can't handle this */
case '\b':
posx-=2; /* BS */
default:
iodc_dbuf[0] = c;
n = 1;
posx++;
break;
}
memset(iodc_dbuf, 0, 4096);
for (i = 0; i < count && i < 2048;) {
switch(str[i]) {
case '\n':
iodc_dbuf[i+0] = '\r';
iodc_dbuf[i+1] = '\n';
i += 2;
posx = 0;
break;
case '\t':
while (posx & 7) {
iodc_dbuf[i] = ' ';
i++, posx++;
}
break;
case '\b': /* BS */
posx -= 2;
default:
iodc_dbuf[i] = str[i];
i++, posx++;
break;
}
}
spin_lock_irqsave(&pdc_lock, flags);
real32_call(PAGE0->mem_cons.iodc_io,
(unsigned long)PAGE0->mem_cons.hpa, ENTRY_IO_COUT,
PAGE0->mem_cons.spa, __pa(PAGE0->mem_cons.dp.layers),
__pa(iodc_retbuf), 0, __pa(iodc_dbuf), n, 0);
__pa(iodc_retbuf), 0, __pa(iodc_dbuf), i, 0);
spin_unlock_irqrestore(&pdc_lock, flags);
}
/**
* pdc_iodc_outc - Console character print using IODC (without conversions).
* @c: the character to output.
*
* Write the character directly to the IODC console.
*/
void pdc_iodc_outc(unsigned char c)
{
unsigned int n;
unsigned long flags;
/* fill buffer with one caracter and print it */
static int __attribute__((aligned(8))) iodc_retbuf[32];
static char __attribute__((aligned(64))) iodc_dbuf[4096];
n = 1;
iodc_dbuf[0] = c;
spin_lock_irqsave(&pdc_lock, flags);
real32_call(PAGE0->mem_cons.iodc_io,
(unsigned long)PAGE0->mem_cons.hpa, ENTRY_IO_COUT,
PAGE0->mem_cons.spa, __pa(PAGE0->mem_cons.dp.layers),
__pa(iodc_retbuf), 0, __pa(iodc_dbuf), n, 0);
spin_unlock_irqrestore(&pdc_lock, flags);
return i;
}
/**
......
arch/parisc/kernel/irq.c
View file @ b242a602
......@@ -397,7 +397,7 @@ static void claim_cpu_irqs(void)
}
irq_desc[TIMER_IRQ].action = &timer_action;
irq_desc[TIMER_IRQ].status |= IRQ_PER_CPU;
irq_desc[TIMER_IRQ].status = IRQ_PER_CPU;
#ifdef CONFIG_SMP
irq_desc[IPI_IRQ].action = &ipi_action;
irq_desc[IPI_IRQ].status = IRQ_PER_CPU;
......
arch/parisc/kernel/parisc_ksyms.c
View file @ b242a602
......@@ -122,9 +122,31 @@ EXPORT_SYMBOL($$divI_12);
EXPORT_SYMBOL($$divI_14);
EXPORT_SYMBOL($$divI_15);
extern void __ashrdi3(void);
extern void __ashldi3(void);
extern void __lshrdi3(void);
extern void __muldi3(void);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__lshrdi3);
EXPORT_SYMBOL(__muldi3);
asmlinkage void * __canonicalize_funcptr_for_compare(void *);
EXPORT_SYMBOL(__canonicalize_funcptr_for_compare);
#ifdef CONFIG_64BIT
extern void __divdi3(void);
extern void __udivdi3(void);
extern void __umoddi3(void);
extern void __moddi3(void);
EXPORT_SYMBOL(__divdi3);
EXPORT_SYMBOL(__udivdi3);
EXPORT_SYMBOL(__umoddi3);
EXPORT_SYMBOL(__moddi3);
#endif
#ifndef CONFIG_64BIT
extern void $$dyncall(void);
EXPORT_SYMBOL($$dyncall);
......
arch/parisc/kernel/pdc_cons.c
View file @ b242a602
......@@ -55,13 +55,7 @@
static void pdc_console_write(struct console *co, const char *s, unsigned count)
{
while(count--)
pdc_iodc_putc(*s++);
}
void pdc_outc(unsigned char c)
{
pdc_iodc_outc(c);
pdc_iodc_print(s, count);
}
void pdc_printf(const char *fmt, ...)
......@@ -74,8 +68,7 @@ void pdc_printf(const char *fmt, ...)
len = vscnprintf(buf, sizeof(buf), fmt, args);
va_end(args);
for (i = 0; i < len; i++)
pdc_iodc_outc(buf[i]);
pdc_iodc_print(buf, len);
}
int pdc_console_poll_key(struct console *co)
......
arch/parisc/lib/Makefile
View file @ b242a602
......@@ -4,4 +4,4 @@
lib-y := lusercopy.o bitops.o checksum.o io.o memset.o fixup.o memcpy.o
obj-y := libgcc/ milli/ iomap.o
obj-y := iomap.o
arch/parisc/lib/libgcc/Makefile deleted 100644 → 0
View file @ e1fd1865
obj-y := __ashldi3.o __ashrdi3.o __clzsi2.o __divdi3.o __divsi3.o \
__lshrdi3.o __moddi3.o __modsi3.o __udivdi3.o \
__udivmoddi4.o __udivmodsi4.o __udivsi3.o \
__umoddi3.o __umodsi3.o __muldi3.o __umulsidi3.o
arch/parisc/lib/libgcc/__ashldi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __ashldi3(u64 v, int cnt)
{
int c = cnt & 31;
u32 vl = (u32) v;
u32 vh = (u32) (v >> 32);
if (cnt & 32) {
vh = (vl << c);
vl = 0;
} else {
vh = (vh << c) + (vl >> (32 - c));
vl = (vl << c);
}
return ((u64) vh << 32) + vl;
}
EXPORT_SYMBOL(__ashldi3);
arch/parisc/lib/libgcc/__ashrdi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __ashrdi3(u64 v, int cnt)
{
int c = cnt & 31;
u32 vl = (u32) v;
u32 vh = (u32) (v >> 32);
if (cnt & 32) {
vl = ((s32) vh >> c);
vh = (s32) vh >> 31;
} else {
vl = (vl >> c) + (vh << (32 - c));
vh = ((s32) vh >> c);
}
return ((u64) vh << 32) + vl;
}
EXPORT_SYMBOL(__ashrdi3);
arch/parisc/lib/libgcc/__clzsi2.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u32 __clzsi2(u32 v)
{
int p = 31;
if (v & 0xffff0000) {
p -= 16;
v >>= 16;
}
if (v & 0xff00) {
p -= 8;
v >>= 8;
}
if (v & 0xf0) {
p -= 4;
v >>= 4;
}
if (v & 0xc) {
p -= 2;
v >>= 2;
}
if (v & 0x2) {
p -= 1;
v >>= 1;
}
return p;
}
EXPORT_SYMBOL(__clzsi2);
arch/parisc/lib/libgcc/__divdi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
s64 __divdi3(s64 num, s64 den)
{
int minus = 0;
s64 v;
if (num < 0) {
num = -num;
minus = 1;
}
if (den < 0) {
den = -den;
minus ^= 1;
}
v = __udivmoddi4(num, den, NULL);
if (minus)
v = -v;
return v;
}
EXPORT_SYMBOL(__divdi3);
arch/parisc/lib/libgcc/__divsi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
s32 __divsi3(s32 num, s32 den)
{
int minus = 0;
s32 v;
if (num < 0) {
num = -num;
minus = 1;
}
if (den < 0) {
den = -den;
minus ^= 1;
}
v = __udivmodsi4(num, den, NULL);
if (minus)
v = -v;
return v;
}
EXPORT_SYMBOL(__divsi3);
arch/parisc/lib/libgcc/__lshrdi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __lshrdi3(u64 v, int cnt)
{
int c = cnt & 31;
u32 vl = (u32) v;
u32 vh = (u32) (v >> 32);
if (cnt & 32) {
vl = (vh >> c);
vh = 0;
} else {
vl = (vl >> c) + (vh << (32 - c));
vh = (vh >> c);
}
return ((u64) vh << 32) + vl;
}
EXPORT_SYMBOL(__lshrdi3);
arch/parisc/lib/libgcc/__moddi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
s64 __moddi3(s64 num, s64 den)
{
int minus = 0;
s64 v;
if (num < 0) {
num = -num;
minus = 1;
}
if (den < 0) {
den = -den;
minus ^= 1;
}
(void)__udivmoddi4(num, den, (u64 *) & v);
if (minus)
v = -v;
return v;
}
EXPORT_SYMBOL(__moddi3);
arch/parisc/lib/libgcc/__modsi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
s32 __modsi3(s32 num, s32 den)
{
int minus = 0;
s32 v;
if (num < 0) {
num = -num;
minus = 1;
}
if (den < 0) {
den = -den;
minus ^= 1;
}
(void)__udivmodsi4(num, den, (u32 *) & v);
if (minus)
v = -v;
return v;
}
EXPORT_SYMBOL(__modsi3);
arch/parisc/lib/libgcc/__muldi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
union DWunion {
struct {
s32 high;
s32 low;
} s;
s64 ll;
};
s64 __muldi3(s64 u, s64 v)
{
const union DWunion uu = { .ll = u };
const union DWunion vv = { .ll = v };
union DWunion w = { .ll = __umulsidi3(uu.s.low, vv.s.low) };
w.s.high += ((u32)uu.s.low * (u32)vv.s.high
+ (u32)uu.s.high * (u32)vv.s.low);
return w.ll;
}
EXPORT_SYMBOL(__muldi3);
arch/parisc/lib/libgcc/__udivdi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __udivdi3(u64 num, u64 den)
{
return __udivmoddi4(num, den, NULL);
}
EXPORT_SYMBOL(__udivdi3);
arch/parisc/lib/libgcc/__udivmoddi4.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __udivmoddi4(u64 num, u64 den, u64 * rem_p)
{
u64 quot = 0, qbit = 1;
if (den == 0) {
BUG();
}
/* Left-justify denominator and count shift */
while ((s64) den >= 0) {
den <<= 1;
qbit <<= 1;
}
while (qbit) {
if (den <= num) {
num -= den;
quot += qbit;
}
den >>= 1;
qbit >>= 1;
}
if (rem_p)
*rem_p = num;
return quot;
}
EXPORT_SYMBOL(__udivmoddi4);
arch/parisc/lib/libgcc/__udivmodsi4.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u32 __udivmodsi4(u32 num, u32 den, u32 * rem_p)
{
u32 quot = 0, qbit = 1;
if (den == 0) {
BUG();
}
/* Left-justify denominator and count shift */
while ((s32) den >= 0) {
den <<= 1;
qbit <<= 1;
}
while (qbit) {
if (den <= num) {
num -= den;
quot += qbit;
}
den >>= 1;
qbit >>= 1;
}
if (rem_p)
*rem_p = num;
return quot;
}
EXPORT_SYMBOL(__udivmodsi4);
arch/parisc/lib/libgcc/__udivsi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u32 __udivsi3(u32 num, u32 den)
{
return __udivmodsi4(num, den, NULL);
}
EXPORT_SYMBOL(__udivsi3);
arch/parisc/lib/libgcc/__umoddi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u64 __umoddi3(u64 num, u64 den)
{
u64 v;
(void)__udivmoddi4(num, den, &v);
return v;
}
EXPORT_SYMBOL(__umoddi3);
arch/parisc/lib/libgcc/__umodsi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
u32 __umodsi3(u32 num, u32 den)
{
u32 v;
(void)__udivmodsi4(num, den, &v);
return v;
}
EXPORT_SYMBOL(__umodsi3);
arch/parisc/lib/libgcc/__umulsidi3.c deleted 100644 → 0
View file @ e1fd1865
#include "libgcc.h"
#define __ll_B ((u32) 1 << (32 / 2))
#define __ll_lowpart(t) ((u32) (t) & (__ll_B - 1))
#define __ll_highpart(t) ((u32) (t) >> 16)
#define umul_ppmm(w1, w0, u, v) \
do { \
u32 __x0, __x1, __x2, __x3; \
u16 __ul, __vl, __uh, __vh; \
\
__ul = __ll_lowpart (u); \
__uh = __ll_highpart (u); \
__vl = __ll_lowpart (v); \
__vh = __ll_highpart (v); \
\
__x0 = (u32) __ul * __vl; \
__x1 = (u32) __ul * __vh; \
__x2 = (u32) __uh * __vl; \
__x3 = (u32) __uh * __vh; \
\
__x1 += __ll_highpart (__x0);/* this can't give carry */ \
__x1 += __x2; /* but this indeed can */ \
if (__x1 < __x2) /* did we get it? */ \
__x3 += __ll_B; /* yes, add it in the proper pos. */ \
\
(w1) = __x3 + __ll_highpart (__x1); \
(w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
} while (0)
union DWunion {
struct {
s32 high;
s32 low;
} s;
s64 ll;
};
u64 __umulsidi3(u32 u, u32 v)
{
union DWunion __w;
umul_ppmm(__w.s.high, __w.s.low, u, v);
return __w.ll;
}
arch/parisc/lib/libgcc/libgcc.h deleted 100644 → 0
View file @ e1fd1865
#ifndef _PA_LIBGCC_H_
#define _PA_LIBGCC_H_
#include <linux/types.h>
#include <linux/module.h>
/* Cribbed from klibc/libgcc/ */
u64 __ashldi3(u64 v, int cnt);
u64 __ashrdi3(u64 v, int cnt);
u32 __clzsi2(u32 v);
s64 __divdi3(s64 num, s64 den);
s32 __divsi3(s32 num, s32 den);
u64 __lshrdi3(u64 v, int cnt);
s64 __moddi3(s64 num, s64 den);
s32 __modsi3(s32 num, s32 den);
u64 __udivdi3(u64 num, u64 den);
u32 __udivsi3(u32 num, u32 den);
u64 __udivmoddi4(u64 num, u64 den, u64 * rem_p);
u32 __udivmodsi4(u32 num, u32 den, u32 * rem_p);
u64 __umulsidi3(u32 u, u32 v);
u64 __umoddi3(u64 num, u64 den);
u32 __umodsi3(u32 num, u32 den);
#endif /*_PA_LIBGCC_H_*/
arch/parisc/lib/milli/Makefile deleted 100644 → 0
View file @ e1fd1865
obj-y := dyncall.o divI.o divU.o remI.o remU.o div_const.o mulI.o
arch/parisc/lib/milli/divI.S deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#include "milli.h"
#ifdef L_divI
/* ROUTINES: $$divI, $$divoI
Single precision divide for signed binary integers.
The quotient is truncated towards zero.
The sign of the quotient is the XOR of the signs of the dividend and
divisor.
Divide by zero is trapped.
Divide of -2**31 by -1 is trapped for $$divoI but not for $$divI.
INPUT REGISTERS:
. arg0 == dividend
. arg1 == divisor
. mrp == return pc
. sr0 == return space when called externally
OUTPUT REGISTERS:
. arg0 = undefined
. arg1 = undefined
. ret1 = quotient
OTHER REGISTERS AFFECTED:
. r1 = undefined
SIDE EFFECTS:
. Causes a trap under the following conditions:
. divisor is zero (traps with ADDIT,= 0,25,0)
. dividend==-2**31 and divisor==-1 and routine is $$divoI
. (traps with ADDO 26,25,0)
. Changes memory at the following places:
. NONE
PERMISSIBLE CONTEXT:
. Unwindable.
. Suitable for internal or external millicode.
. Assumes the special millicode register conventions.
DISCUSSION:
. Branchs to other millicode routines using BE
. $$div_# for # being 2,3,4,5,6,7,8,9,10,12,14,15
.
. For selected divisors, calls a divide by constant routine written by
. Karl Pettis. Eligible divisors are 1..15 excluding 11 and 13.
.
. The only overflow case is -2**31 divided by -1.
. Both routines return -2**31 but only $$divoI traps. */
RDEFINE(temp,r1)
RDEFINE(retreg,ret1) /* r29 */
RDEFINE(temp1,arg0)
SUBSPA_MILLI_DIV
ATTR_MILLI
.import $$divI_2,millicode
.import $$divI_3,millicode
.import $$divI_4,millicode
.import $$divI_5,millicode
.import $$divI_6,millicode
.import $$divI_7,millicode
.import $$divI_8,millicode
.import $$divI_9,millicode
.import $$divI_10,millicode
.import $$divI_12,millicode
.import $$divI_14,millicode
.import $$divI_15,millicode
.export $$divI,millicode
.export $$divoI,millicode
.proc
.callinfo millicode
.entry
GSYM($$divoI)
comib,=,n -1,arg1,LREF(negative1) /* when divisor == -1 */
GSYM($$divI)
ldo -1(arg1),temp /* is there at most one bit set ? */
and,<> arg1,temp,r0 /* if not, don't use power of 2 divide */
addi,> 0,arg1,r0 /* if divisor > 0, use power of 2 divide */
b,n LREF(neg_denom)
LSYM(pow2)
addi,>= 0,arg0,retreg /* if numerator is negative, add the */
add arg0,temp,retreg /* (denominaotr -1) to correct for shifts */
extru,= arg1,15,16,temp /* test denominator with 0xffff0000 */
extrs retreg,15,16,retreg /* retreg = retreg >> 16 */
or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 16) */
ldi 0xcc,temp1 /* setup 0xcc in temp1 */
extru,= arg1,23,8,temp /* test denominator with 0xff00 */
extrs retreg,23,24,retreg /* retreg = retreg >> 8 */
or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 8) */
ldi 0xaa,temp /* setup 0xaa in temp */
extru,= arg1,27,4,r0 /* test denominator with 0xf0 */
extrs retreg,27,28,retreg /* retreg = retreg >> 4 */
and,= arg1,temp1,r0 /* test denominator with 0xcc */
extrs retreg,29,30,retreg /* retreg = retreg >> 2 */
and,= arg1,temp,r0 /* test denominator with 0xaa */
extrs retreg,30,31,retreg /* retreg = retreg >> 1 */
MILLIRETN
LSYM(neg_denom)
addi,< 0,arg1,r0 /* if arg1 >= 0, it's not power of 2 */
b,n LREF(regular_seq)
sub r0,arg1,temp /* make denominator positive */
comb,=,n arg1,temp,LREF(regular_seq) /* test against 0x80000000 and 0 */
ldo -1(temp),retreg /* is there at most one bit set ? */
and,= temp,retreg,r0 /* if so, the denominator is power of 2 */
b,n LREF(regular_seq)
sub r0,arg0,retreg /* negate numerator */
comb,=,n arg0,retreg,LREF(regular_seq) /* test against 0x80000000 */
copy retreg,arg0 /* set up arg0, arg1 and temp */
copy temp,arg1 /* before branching to pow2 */
b LREF(pow2)
ldo -1(arg1),temp
LSYM(regular_seq)
comib,>>=,n 15,arg1,LREF(small_divisor)
add,>= 0,arg0,retreg /* move dividend, if retreg < 0, */
LSYM(normal)
subi 0,retreg,retreg /* make it positive */
sub 0,arg1,temp /* clear carry, */
/* negate the divisor */
ds 0,temp,0 /* set V-bit to the comple- */
/* ment of the divisor sign */
add retreg,retreg,retreg /* shift msb bit into carry */
ds r0,arg1,temp /* 1st divide step, if no carry */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 2nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 3rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 4th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 5th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 6th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 7th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 8th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 9th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 10th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 11th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 12th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 13th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 14th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 15th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 16th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 17th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 18th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 19th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 20th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 21st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 22nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 23rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 24th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 25th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 26th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 27th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 28th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 29th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 30th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 31st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 32nd divide step, */
addc retreg,retreg,retreg /* shift last retreg bit into retreg */
xor,>= arg0,arg1,0 /* get correct sign of quotient */
sub 0,retreg,retreg /* based on operand signs */
MILLIRETN
nop
LSYM(small_divisor)
#if defined(CONFIG_64BIT)
/* Clear the upper 32 bits of the arg1 register. We are working with */
/* small divisors (and 32-bit integers) We must not be mislead */
/* by "1" bits left in the upper 32 bits. */
depd %r0,31,32,%r25
#endif
blr,n arg1,r0
nop
/* table for divisor == 0,1, ... ,15 */
addit,= 0,arg1,r0 /* trap if divisor == 0 */
nop
MILLIRET /* divisor == 1 */
copy arg0,retreg
MILLI_BEN($$divI_2) /* divisor == 2 */
nop
MILLI_BEN($$divI_3) /* divisor == 3 */
nop
MILLI_BEN($$divI_4) /* divisor == 4 */
nop
MILLI_BEN($$divI_5) /* divisor == 5 */
nop
MILLI_BEN($$divI_6) /* divisor == 6 */
nop
MILLI_BEN($$divI_7) /* divisor == 7 */
nop
MILLI_BEN($$divI_8) /* divisor == 8 */
nop
MILLI_BEN($$divI_9) /* divisor == 9 */
nop
MILLI_BEN($$divI_10) /* divisor == 10 */
nop
b LREF(normal) /* divisor == 11 */
add,>= 0,arg0,retreg
MILLI_BEN($$divI_12) /* divisor == 12 */
nop
b LREF(normal) /* divisor == 13 */
add,>= 0,arg0,retreg
MILLI_BEN($$divI_14) /* divisor == 14 */
nop
MILLI_BEN($$divI_15) /* divisor == 15 */
nop
LSYM(negative1)
sub 0,arg0,retreg /* result is negation of dividend */
MILLIRET
addo arg0,arg1,r0 /* trap iff dividend==0x80000000 && divisor==-1 */
.exit
.procend
.end
#endif
arch/parisc/lib/milli/divU.S deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#include "milli.h"
#ifdef L_divU
/* ROUTINE: $$divU
.
. Single precision divide for unsigned integers.
.
. Quotient is truncated towards zero.
. Traps on divide by zero.
INPUT REGISTERS:
. arg0 == dividend
. arg1 == divisor
. mrp == return pc
. sr0 == return space when called externally
OUTPUT REGISTERS:
. arg0 = undefined
. arg1 = undefined
. ret1 = quotient
OTHER REGISTERS AFFECTED:
. r1 = undefined
SIDE EFFECTS:
. Causes a trap under the following conditions:
. divisor is zero
. Changes memory at the following places:
. NONE
PERMISSIBLE CONTEXT:
. Unwindable.
. Does not create a stack frame.
. Suitable for internal or external millicode.
. Assumes the special millicode register conventions.
DISCUSSION:
. Branchs to other millicode routines using BE:
. $$divU_# for 3,5,6,7,9,10,12,14,15
.
. For selected small divisors calls the special divide by constant
. routines written by Karl Pettis. These are: 3,5,6,7,9,10,12,14,15. */
RDEFINE(temp,r1)
RDEFINE(retreg,ret1) /* r29 */
RDEFINE(temp1,arg0)
SUBSPA_MILLI_DIV
ATTR_MILLI
.export $$divU,millicode
.import $$divU_3,millicode
.import $$divU_5,millicode
.import $$divU_6,millicode
.import $$divU_7,millicode
.import $$divU_9,millicode
.import $$divU_10,millicode
.import $$divU_12,millicode
.import $$divU_14,millicode
.import $$divU_15,millicode
.proc
.callinfo millicode
.entry
GSYM($$divU)
/* The subtract is not nullified since it does no harm and can be used
by the two cases that branch back to "normal". */
ldo -1(arg1),temp /* is there at most one bit set ? */
and,= arg1,temp,r0 /* if so, denominator is power of 2 */
b LREF(regular_seq)
addit,= 0,arg1,0 /* trap for zero dvr */
copy arg0,retreg
extru,= arg1,15,16,temp /* test denominator with 0xffff0000 */
extru retreg,15,16,retreg /* retreg = retreg >> 16 */
or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 16) */
ldi 0xcc,temp1 /* setup 0xcc in temp1 */
extru,= arg1,23,8,temp /* test denominator with 0xff00 */
extru retreg,23,24,retreg /* retreg = retreg >> 8 */
or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 8) */
ldi 0xaa,temp /* setup 0xaa in temp */
extru,= arg1,27,4,r0 /* test denominator with 0xf0 */
extru retreg,27,28,retreg /* retreg = retreg >> 4 */
and,= arg1,temp1,r0 /* test denominator with 0xcc */
extru retreg,29,30,retreg /* retreg = retreg >> 2 */
and,= arg1,temp,r0 /* test denominator with 0xaa */
extru retreg,30,31,retreg /* retreg = retreg >> 1 */
MILLIRETN
nop
LSYM(regular_seq)
comib,>= 15,arg1,LREF(special_divisor)
subi 0,arg1,temp /* clear carry, negate the divisor */
ds r0,temp,r0 /* set V-bit to 1 */
LSYM(normal)
add arg0,arg0,retreg /* shift msb bit into carry */
ds r0,arg1,temp /* 1st divide step, if no carry */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 2nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 3rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 4th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 5th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 6th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 7th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 8th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 9th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 10th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 11th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 12th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 13th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 14th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 15th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 16th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 17th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 18th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 19th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 20th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 21st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 22nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 23rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 24th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 25th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 26th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 27th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 28th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 29th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 30th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 31st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds temp,arg1,temp /* 32nd divide step, */
MILLIRET
addc retreg,retreg,retreg /* shift last retreg bit into retreg */
/* Handle the cases where divisor is a small constant or has high bit on. */
LSYM(special_divisor)
/* blr arg1,r0 */
/* comib,>,n 0,arg1,LREF(big_divisor) ; nullify previous instruction */
/* Pratap 8/13/90. The 815 Stirling chip set has a bug that prevents us from
generating such a blr, comib sequence. A problem in nullification. So I
rewrote this code. */
#if defined(CONFIG_64BIT)
/* Clear the upper 32 bits of the arg1 register. We are working with
small divisors (and 32-bit unsigned integers) We must not be mislead
by "1" bits left in the upper 32 bits. */
depd %r0,31,32,%r25
#endif
comib,> 0,arg1,LREF(big_divisor)
nop
blr arg1,r0
nop
LSYM(zero_divisor) /* this label is here to provide external visibility */
addit,= 0,arg1,0 /* trap for zero dvr */
nop
MILLIRET /* divisor == 1 */
copy arg0,retreg
MILLIRET /* divisor == 2 */
extru arg0,30,31,retreg
MILLI_BEN($$divU_3) /* divisor == 3 */
nop
MILLIRET /* divisor == 4 */
extru arg0,29,30,retreg
MILLI_BEN($$divU_5) /* divisor == 5 */
nop
MILLI_BEN($$divU_6) /* divisor == 6 */
nop
MILLI_BEN($$divU_7) /* divisor == 7 */
nop
MILLIRET /* divisor == 8 */
extru arg0,28,29,retreg
MILLI_BEN($$divU_9) /* divisor == 9 */
nop
MILLI_BEN($$divU_10) /* divisor == 10 */
nop
b LREF(normal) /* divisor == 11 */
ds r0,temp,r0 /* set V-bit to 1 */
MILLI_BEN($$divU_12) /* divisor == 12 */
nop
b LREF(normal) /* divisor == 13 */
ds r0,temp,r0 /* set V-bit to 1 */
MILLI_BEN($$divU_14) /* divisor == 14 */
nop
MILLI_BEN($$divU_15) /* divisor == 15 */
nop
/* Handle the case where the high bit is on in the divisor.
Compute: if( dividend>=divisor) quotient=1; else quotient=0;
Note: dividend>==divisor iff dividend-divisor does not borrow
and not borrow iff carry. */
LSYM(big_divisor)
sub arg0,arg1,r0
MILLIRET
addc r0,r0,retreg
.exit
.procend
.end
#endif
arch/parisc/lib/milli/div_const.S deleted 100644 → 0
View file @ e1fd1865
This diff is collapsed.
arch/parisc/lib/milli/dyncall.S deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#include "milli.h"
#ifdef L_dyncall
SUBSPA_MILLI
ATTR_DATA
GSYM($$dyncall)
.export $$dyncall,millicode
.proc
.callinfo millicode
.entry
bb,>=,n %r22,30,LREF(1) ; branch if not plabel address
depi 0,31,2,%r22 ; clear the two least significant bits
ldw 4(%r22),%r19 ; load new LTP value
ldw 0(%r22),%r22 ; load address of target
LSYM(1)
bv %r0(%r22) ; branch to the real target
stw %r2,-24(%r30) ; save return address into frame marker
.exit
.procend
#endif
arch/parisc/lib/milli/milli.S deleted 100644 → 0
View file @ e1fd1865
This diff is collapsed.
arch/parisc/lib/milli/milli.h deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#ifndef _PA_MILLI_H_
#define _PA_MILLI_H_
#define L_dyncall
#define L_divI
#define L_divU
#define L_remI
#define L_remU
#define L_div_const
#define L_mulI
#ifdef CONFIG_64BIT
.level 2.0w
#endif
/* Hardware General Registers. */
r0: .reg %r0
r1: .reg %r1
r2: .reg %r2
r3: .reg %r3
r4: .reg %r4
r5: .reg %r5
r6: .reg %r6
r7: .reg %r7
r8: .reg %r8
r9: .reg %r9
r10: .reg %r10
r11: .reg %r11
r12: .reg %r12
r13: .reg %r13
r14: .reg %r14
r15: .reg %r15
r16: .reg %r16
r17: .reg %r17
r18: .reg %r18
r19: .reg %r19
r20: .reg %r20
r21: .reg %r21
r22: .reg %r22
r23: .reg %r23
r24: .reg %r24
r25: .reg %r25
r26: .reg %r26
r27: .reg %r27
r28: .reg %r28
r29: .reg %r29
r30: .reg %r30
r31: .reg %r31
/* Hardware Space Registers. */
sr0: .reg %sr0
sr1: .reg %sr1
sr2: .reg %sr2
sr3: .reg %sr3
sr4: .reg %sr4
sr5: .reg %sr5
sr6: .reg %sr6
sr7: .reg %sr7
/* Hardware Floating Point Registers. */
fr0: .reg %fr0
fr1: .reg %fr1
fr2: .reg %fr2
fr3: .reg %fr3
fr4: .reg %fr4
fr5: .reg %fr5
fr6: .reg %fr6
fr7: .reg %fr7
fr8: .reg %fr8
fr9: .reg %fr9
fr10: .reg %fr10
fr11: .reg %fr11
fr12: .reg %fr12
fr13: .reg %fr13
fr14: .reg %fr14
fr15: .reg %fr15
/* Hardware Control Registers. */
cr11: .reg %cr11
sar: .reg %cr11 /* Shift Amount Register */
/* Software Architecture General Registers. */
rp: .reg r2 /* return pointer */
#ifdef CONFIG_64BIT
mrp: .reg r2 /* millicode return pointer */
#else
mrp: .reg r31 /* millicode return pointer */
#endif
ret0: .reg r28 /* return value */
ret1: .reg r29 /* return value (high part of double) */
sp: .reg r30 /* stack pointer */
dp: .reg r27 /* data pointer */
arg0: .reg r26 /* argument */
arg1: .reg r25 /* argument or high part of double argument */
arg2: .reg r24 /* argument */
arg3: .reg r23 /* argument or high part of double argument */
/* Software Architecture Space Registers. */
/* sr0 ; return link from BLE */
sret: .reg sr1 /* return value */
sarg: .reg sr1 /* argument */
/* sr4 ; PC SPACE tracker */
/* sr5 ; process private data */
/* Frame Offsets (millicode convention!) Used when calling other
millicode routines. Stack unwinding is dependent upon these
definitions. */
r31_slot: .equ -20 /* "current RP" slot */
sr0_slot: .equ -16 /* "static link" slot */
#if defined(CONFIG_64BIT)
mrp_slot: .equ -16 /* "current RP" slot */
psp_slot: .equ -8 /* "previous SP" slot */
#else
mrp_slot: .equ -20 /* "current RP" slot (replacing "r31_slot") */
#endif
#define DEFINE(name,value)name: .EQU value
#define RDEFINE(name,value)name: .REG value
#ifdef milliext
#define MILLI_BE(lbl) BE lbl(sr7,r0)
#define MILLI_BEN(lbl) BE,n lbl(sr7,r0)
#define MILLI_BLE(lbl) BLE lbl(sr7,r0)
#define MILLI_BLEN(lbl) BLE,n lbl(sr7,r0)
#define MILLIRETN BE,n 0(sr0,mrp)
#define MILLIRET BE 0(sr0,mrp)
#define MILLI_RETN BE,n 0(sr0,mrp)
#define MILLI_RET BE 0(sr0,mrp)
#else
#define MILLI_BE(lbl) B lbl
#define MILLI_BEN(lbl) B,n lbl
#define MILLI_BLE(lbl) BL lbl,mrp
#define MILLI_BLEN(lbl) BL,n lbl,mrp
#define MILLIRETN BV,n 0(mrp)
#define MILLIRET BV 0(mrp)
#define MILLI_RETN BV,n 0(mrp)
#define MILLI_RET BV 0(mrp)
#endif
#define CAT(a,b) a##b
#define SUBSPA_MILLI .section .text
#define SUBSPA_MILLI_DIV .section .text.div,"ax",@progbits! .align 16
#define SUBSPA_MILLI_MUL .section .text.mul,"ax",@progbits! .align 16
#define ATTR_MILLI
#define SUBSPA_DATA .section .data
#define ATTR_DATA
#define GLOBAL $global$
#define GSYM(sym) !sym:
#define LSYM(sym) !CAT(.L,sym:)
#define LREF(sym) CAT(.L,sym)
#endif /*_PA_MILLI_H_*/
arch/parisc/lib/milli/mulI.S deleted 100644 → 0
View file @ e1fd1865
This diff is collapsed.
arch/parisc/lib/milli/remI.S deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#include "milli.h"
#ifdef L_remI
/* ROUTINE: $$remI
DESCRIPTION:
. $$remI returns the remainder of the division of two signed 32-bit
. integers. The sign of the remainder is the same as the sign of
. the dividend.
INPUT REGISTERS:
. arg0 == dividend
. arg1 == divisor
. mrp == return pc
. sr0 == return space when called externally
OUTPUT REGISTERS:
. arg0 = destroyed
. arg1 = destroyed
. ret1 = remainder
OTHER REGISTERS AFFECTED:
. r1 = undefined
SIDE EFFECTS:
. Causes a trap under the following conditions: DIVIDE BY ZERO
. Changes memory at the following places: NONE
PERMISSIBLE CONTEXT:
. Unwindable
. Does not create a stack frame
. Is usable for internal or external microcode
DISCUSSION:
. Calls other millicode routines via mrp: NONE
. Calls other millicode routines: NONE */
RDEFINE(tmp,r1)
RDEFINE(retreg,ret1)
SUBSPA_MILLI
ATTR_MILLI
.proc
.callinfo millicode
.entry
GSYM($$remI)
GSYM($$remoI)
.export $$remI,MILLICODE
.export $$remoI,MILLICODE
ldo -1(arg1),tmp /* is there at most one bit set ? */
and,<> arg1,tmp,r0 /* if not, don't use power of 2 */
addi,> 0,arg1,r0 /* if denominator > 0, use power */
/* of 2 */
b,n LREF(neg_denom)
LSYM(pow2)
comb,>,n 0,arg0,LREF(neg_num) /* is numerator < 0 ? */
and arg0,tmp,retreg /* get the result */
MILLIRETN
LSYM(neg_num)
subi 0,arg0,arg0 /* negate numerator */
and arg0,tmp,retreg /* get the result */
subi 0,retreg,retreg /* negate result */
MILLIRETN
LSYM(neg_denom)
addi,< 0,arg1,r0 /* if arg1 >= 0, it's not power */
/* of 2 */
b,n LREF(regular_seq)
sub r0,arg1,tmp /* make denominator positive */
comb,=,n arg1,tmp,LREF(regular_seq) /* test against 0x80000000 and 0 */
ldo -1(tmp),retreg /* is there at most one bit set ? */
and,= tmp,retreg,r0 /* if not, go to regular_seq */
b,n LREF(regular_seq)
comb,>,n 0,arg0,LREF(neg_num_2) /* if arg0 < 0, negate it */
and arg0,retreg,retreg
MILLIRETN
LSYM(neg_num_2)
subi 0,arg0,tmp /* test against 0x80000000 */
and tmp,retreg,retreg
subi 0,retreg,retreg
MILLIRETN
LSYM(regular_seq)
addit,= 0,arg1,0 /* trap if div by zero */
add,>= 0,arg0,retreg /* move dividend, if retreg < 0, */
sub 0,retreg,retreg /* make it positive */
sub 0,arg1, tmp /* clear carry, */
/* negate the divisor */
ds 0, tmp,0 /* set V-bit to the comple- */
/* ment of the divisor sign */
or 0,0, tmp /* clear tmp */
add retreg,retreg,retreg /* shift msb bit into carry */
ds tmp,arg1, tmp /* 1st divide step, if no carry */
/* out, msb of quotient = 0 */
addc retreg,retreg,retreg /* shift retreg with/into carry */
LSYM(t1)
ds tmp,arg1, tmp /* 2nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 3rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 4th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 5th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 6th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 7th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 8th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 9th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 10th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 11th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 12th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 13th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 14th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 15th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 16th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 17th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 18th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 19th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 20th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 21st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 22nd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 23rd divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 24th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 25th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 26th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 27th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 28th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 29th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 30th divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 31st divide step */
addc retreg,retreg,retreg /* shift retreg with/into carry */
ds tmp,arg1, tmp /* 32nd divide step, */
addc retreg,retreg,retreg /* shift last bit into retreg */
movb,>=,n tmp,retreg,LREF(finish) /* branch if pos. tmp */
add,< arg1,0,0 /* if arg1 > 0, add arg1 */
add,tr tmp,arg1,retreg /* for correcting remainder tmp */
sub tmp,arg1,retreg /* else add absolute value arg1 */
LSYM(finish)
add,>= arg0,0,0 /* set sign of remainder */
sub 0,retreg,retreg /* to sign of dividend */
MILLIRET
nop
.exit
.procend
#ifdef milliext
.origin 0x00000200
#endif
.end
#endif
arch/parisc/lib/milli/remU.S deleted 100644 → 0
View file @ e1fd1865
/* 32 and 64-bit millicode, original author Hewlett-Packard
adapted for gcc by Paul Bame <bame@debian.org>
and Alan Modra <alan@linuxcare.com.au>.
Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC and is released under the terms of
of the GNU General Public License as published by the Free Software
Foundation; either version 2, or (at your option) any later version.
See the file COPYING in the top-level GCC source directory for a copy
of the license. */
#include "milli.h"
#ifdef L_remU
/* ROUTINE: $$remU
. Single precision divide for remainder with unsigned binary integers.
.
. The remainder must be dividend-(dividend/divisor)*divisor.
. Divide by zero is trapped.
INPUT REGISTERS:
. arg0 == dividend
. arg1 == divisor
. mrp == return pc
. sr0 == return space when called externally
OUTPUT REGISTERS:
. arg0 = undefined
. arg1 = undefined
. ret1 = remainder
OTHER REGISTERS AFFECTED:
. r1 = undefined
SIDE EFFECTS:
. Causes a trap under the following conditions: DIVIDE BY ZERO
. Changes memory at the following places: NONE
PERMISSIBLE CONTEXT:
. Unwindable.
. Does not create a stack frame.
. Suitable for internal or external millicode.
. Assumes the special millicode register conventions.
DISCUSSION:
. Calls other millicode routines using mrp: NONE
. Calls other millicode routines: NONE */
RDEFINE(temp,r1)
RDEFINE(rmndr,ret1) /* r29 */
SUBSPA_MILLI
ATTR_MILLI
.export $$remU,millicode
.proc
.callinfo millicode
.entry
GSYM($$remU)
ldo -1(arg1),temp /* is there at most one bit set ? */
and,= arg1,temp,r0 /* if not, don't use power of 2 */
b LREF(regular_seq)
addit,= 0,arg1,r0 /* trap on div by zero */
and arg0,temp,rmndr /* get the result for power of 2 */
MILLIRETN
LSYM(regular_seq)
comib,>=,n 0,arg1,LREF(special_case)
subi 0,arg1,rmndr /* clear carry, negate the divisor */
ds r0,rmndr,r0 /* set V-bit to 1 */
add arg0,arg0,temp /* shift msb bit into carry */
ds r0,arg1,rmndr /* 1st divide step, if no carry */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 2nd divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 3rd divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 4th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 5th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 6th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 7th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 8th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 9th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 10th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 11th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 12th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 13th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 14th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 15th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 16th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 17th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 18th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 19th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 20th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 21st divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 22nd divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 23rd divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 24th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 25th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 26th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 27th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 28th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 29th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 30th divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 31st divide step */
addc temp,temp,temp /* shift temp with/into carry */
ds rmndr,arg1,rmndr /* 32nd divide step, */
comiclr,<= 0,rmndr,r0
add rmndr,arg1,rmndr /* correction */
MILLIRETN
nop
/* Putting >= on the last DS and deleting COMICLR does not work! */
LSYM(special_case)
sub,>>= arg0,arg1,rmndr
copy arg0,rmndr
MILLIRETN
nop
.exit
.procend
.end
#endif
arch/powerpc/boot/dts/sequoia.dts
View file @ b242a602
......@@ -245,6 +245,7 @@ RGMII0: emac-rgmii@ef601000 {
device_type = "rgmii-interface";
compatible = "ibm,rgmii-440epx", "ibm,rgmii";
reg = <ef601000 8>;
has-mdio;
};
EMAC0: ethernet@ef600e00 {
......@@ -273,6 +274,8 @@ EMAC0: ethernet@ef600e00 {
zmii-channel = <0>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
EMAC1: ethernet@ef600f00 {
......@@ -301,6 +304,8 @@ EMAC1: ethernet@ef600f00 {
zmii-channel = <1>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
};
};
......
arch/powerpc/configs/bamboo_defconfig
View file @ b242a602
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23
# Fri Oct 19 09:01:11 2007
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:48:04 2007
#
# CONFIG_PPC64 is not set
......@@ -69,11 +69,14 @@ CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
......@@ -209,6 +212,7 @@ CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
......@@ -287,10 +291,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
......@@ -690,16 +690,16 @@ CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
#
# Instrumentation Support
#
CONFIG_INSTRUMENTATION=y
# CONFIG_PROFILING is not set
# CONFIG_KPROBES is not set
# CONFIG_MARKERS is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
......@@ -723,10 +723,12 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
CONFIG_FORCED_INLINING=y
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
......
arch/powerpc/configs/cell_defconfig
View file @ b242a602
This diff is collapsed.
arch/powerpc/configs/celleb_defconfig
View file @ b242a602
This diff is collapsed.
arch/powerpc/configs/chrp32_defconfig
View file @ b242a602
This diff is collapsed.
arch/powerpc/configs/ebony_defconfig
View file @ b242a602
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23
# Thu Oct 18 08:01:57 2007
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:48:11 2007
#
# CONFIG_PPC64 is not set
......@@ -43,7 +43,7 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_PPC_OF=y
CONFIG_OF=y
# CONFIG_PPC_UDBG_16550 is not set
CONFIG_PPC_UDBG_16550=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_BUG=y
......@@ -68,11 +68,14 @@ CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
......@@ -206,6 +209,7 @@ CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
......@@ -284,10 +288,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
......@@ -568,7 +568,6 @@ CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
......@@ -587,6 +586,7 @@ CONFIG_DEVPORT=y
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_WATCHDOG is not set
#
# Sonics Silicon Backplane
......@@ -772,16 +772,13 @@ CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
#
# Instrumentation Support
#
# CONFIG_PROFILING is not set
# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
......@@ -805,10 +802,12 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
CONFIG_FORCED_INLINING=y
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
......
arch/powerpc/configs/ep88xc_defconfig
View file @ b242a602
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23-rc6
# Fri Sep 14 14:59:56 2007
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:48:13 2007
#
# CONFIG_PPC64 is not set
......@@ -18,8 +18,13 @@ CONFIG_8xx=y
# CONFIG_PPC_MM_SLICES is not set
CONFIG_NOT_COHERENT_CACHE=y
CONFIG_PPC32=y
CONFIG_WORD_SIZE=32
CONFIG_PPC_MERGE=y
CONFIG_MMU=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_IRQ_PER_CPU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
......@@ -59,9 +64,12 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
# CONFIG_FAIR_GROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
......@@ -81,7 +89,6 @@ CONFIG_BUG=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
# CONFIG_VM_EVENT_COUNTERS is not set
......@@ -158,6 +165,10 @@ CONFIG_CPM=y
# Kernel options
#
# CONFIG_HIGHMEM is not set
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_HZ_100=y
# CONFIG_HZ_250 is not set
# CONFIG_HZ_300 is not set
......@@ -169,6 +180,7 @@ CONFIG_PREEMPT_NONE=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_MATH_EMULATION is not set
CONFIG_8XX_MINIMAL_FPEMU=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
......@@ -179,6 +191,7 @@ CONFIG_FLATMEM_MANUAL=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
......@@ -204,10 +217,6 @@ CONFIG_FSL_SOC=y
# CONFIG_PCI_SYSCALL is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
......@@ -259,6 +268,7 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
......@@ -284,10 +294,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
......@@ -316,6 +322,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
......@@ -339,6 +346,7 @@ CONFIG_MTD_BLOCK=y
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set
#
# RAM/ROM/Flash chip drivers
......@@ -418,6 +426,7 @@ CONFIG_NETDEVICES=y
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
CONFIG_PHYLIB=y
#
......@@ -436,9 +445,15 @@ CONFIG_LXT_PHY=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
CONFIG_FS_ENET=y
# CONFIG_FS_ENET_HAS_SCC is not set
CONFIG_FS_ENET_HAS_FEC=y
CONFIG_FS_ENET_MDIO_FEC=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
......@@ -496,7 +511,6 @@ CONFIG_SERIAL_CPM_SMC2=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=y
# CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
......@@ -514,6 +528,13 @@ CONFIG_GEN_RTC=y
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_WATCHDOG is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
......@@ -530,16 +551,15 @@ CONFIG_DAB=y
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
#
# Sound
......@@ -551,19 +571,6 @@ CONFIG_DAB=y
# CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Userspace I/O
#
......@@ -613,7 +620,6 @@ CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
......@@ -633,10 +639,7 @@ CONFIG_CRAMFS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
......@@ -678,15 +681,7 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
# CONFIG_UCC_SLOW is not set
......@@ -703,16 +698,13 @@ CONFIG_ZLIB_INFLATE=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
#
# Instrumentation Support
#
# CONFIG_PROFILING is not set
# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
......@@ -734,8 +726,11 @@ CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
CONFIG_FORCED_INLINING=y
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
......@@ -748,4 +743,7 @@ CONFIG_FORCED_INLINING=y
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_CRYPTO is not set
# CONFIG_PPC_CLOCK is not set
CONFIG_PPC_LIB_RHEAP=y
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arch/powerpc/configs/pasemi_defconfig
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#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc2
# Tue Nov 6 23:23:50 2007
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:49:03 2007
#
CONFIG_PPC64=y
......@@ -68,6 +68,7 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=17
......@@ -211,6 +212,7 @@ CONFIG_PREEMPT_NONE=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_FORCE_MAX_ZONEORDER=9
CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
CONFIG_IOMMU_VMERGE=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
# CONFIG_KEXEC is not set
......@@ -774,7 +776,6 @@ CONFIG_PASEMI_MAC=y
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_USBNET is not set
# CONFIG_NET_PCMCIA is not set
# CONFIG_WAN is not set
......@@ -958,6 +959,7 @@ CONFIG_HWMON_VID=y
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
......
arch/powerpc/configs/pmac32_defconfig
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arch/powerpc/configs/ppc64_defconfig
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#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc2
# Tue Nov 6 23:43:56 2007
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:49:07 2007
#
CONFIG_PPC64=y
......@@ -73,6 +73,7 @@ CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
# CONFIG_TASK_XACCT is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
......@@ -80,11 +81,11 @@ CONFIG_LOG_BUF_SHIFT=17
CONFIG_CGROUPS=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CGROUP_NS is not set
# CONFIG_CGROUP_CPUACCT is not set
CONFIG_CPUSETS=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
# CONFIG_CGROUP_CPUACCT is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_RELAY=y
......@@ -258,6 +259,7 @@ CONFIG_PREEMPT_NONE=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
CONFIG_IOMMU_VMERGE=y
CONFIG_HOTPLUG_CPU=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
......@@ -955,7 +957,6 @@ CONFIG_IBMOL=y
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_USBNET is not set
# CONFIG_NET_PCMCIA is not set
# CONFIG_WAN is not set
......
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......@@ -326,8 +326,7 @@ int main(void)
DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
#endif
#ifdef CONFIG_PPC64
DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
#endif
return 0;
}
arch/powerpc/kernel/head_32.S
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......@@ -1311,7 +1311,7 @@ empty_zero_page:
.globl swapper_pg_dir
swapper_pg_dir:
.space 4096
.space PGD_TABLE_SIZE
.globl intercept_table
intercept_table:
......
arch/powerpc/kernel/head_40x.S
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......@@ -994,7 +994,7 @@ empty_zero_page:
.space 4096
.globl swapper_pg_dir
swapper_pg_dir:
.space 4096
.space PGD_TABLE_SIZE
/* Stack for handling critical exceptions from kernel mode */
......
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