Commit b2557764 authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller

net: phy: Add support for 100BaseT1 and 1000BaseT1

Add link modes for 100Mbps and 1Gbps over a single pair.
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 565d9d22
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
const char *phy_speed_to_str(int speed) const char *phy_speed_to_str(int speed)
{ {
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 67, BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 69,
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. " "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
"If a speed or mode has been added please update phy_speed_to_str " "If a speed or mode has been added please update phy_speed_to_str "
"and the PHY settings array.\n"); "and the PHY settings array.\n");
...@@ -131,9 +131,11 @@ static const struct phy_setting settings[] = { ...@@ -131,9 +131,11 @@ static const struct phy_setting settings[] = {
PHY_SETTING( 1000, FULL, 1000baseKX_Full ), PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
PHY_SETTING( 1000, FULL, 1000baseT_Full ), PHY_SETTING( 1000, FULL, 1000baseT_Full ),
PHY_SETTING( 1000, HALF, 1000baseT_Half ), PHY_SETTING( 1000, HALF, 1000baseT_Half ),
PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
PHY_SETTING( 1000, FULL, 1000baseX_Full ), PHY_SETTING( 1000, FULL, 1000baseX_Full ),
/* 100M */ /* 100M */
PHY_SETTING( 100, FULL, 100baseT_Full ), PHY_SETTING( 100, FULL, 100baseT_Full ),
PHY_SETTING( 100, FULL, 100baseT1_Full ),
PHY_SETTING( 100, HALF, 100baseT_Half ), PHY_SETTING( 100, HALF, 100baseT_Half ),
/* 10M */ /* 10M */
PHY_SETTING( 10, FULL, 10baseT_Full ), PHY_SETTING( 10, FULL, 10baseT_Full ),
......
...@@ -1483,6 +1483,8 @@ enum ethtool_link_mode_bit_indices { ...@@ -1483,6 +1483,8 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64, ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65, ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65,
ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66,
ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67,
ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68,
/* must be last entry */ /* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS __ETHTOOL_LINK_MODE_MASK_NBITS
......
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