Commit b2f7c0f1 authored by Wambui Karuga's avatar Wambui Karuga Committed by Jani Nikula

drm/i915/vlv_dsi_pll: conversion to struct drm_device logging macros.

Convert the printk based logging macros to the new struct drm_device
based logging macros in i915/display/vlv_dsi_pll.c using the following
coccinelle script that matches based on the existence of a drm_i915_private
device:
@@
identifier fn, T;
@@

fn(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-DRM_INFO(
+drm_info(&T->drm,
...)
|
-DRM_ERROR(
+drm_err(&T->drm,
...)
|
-DRM_WARN(
+drm_warn(&T->drm,
...)
|
-DRM_DEBUG(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(&T->drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(&T->drm,
...)
)
...+>
}

@@
identifier fn, T;
@@

fn(...,struct drm_i915_private *T,...) {
<+...
(
-DRM_INFO(
+drm_info(&T->drm,
...)
|
-DRM_ERROR(
+drm_err(&T->drm,
...)
|
-DRM_WARN(
+drm_warn(&T->drm,
...)
|
-DRM_DEBUG(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(&T->drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(&T->drm,
...)
)
...+>
}

Checkpatch warnings were fixed manually.
Signed-off-by: default avatarWambui Karuga <wambui.karugax@gmail.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200130083229.12889-2-wambui.karugax@gmail.com
parent f4224a4c
...@@ -64,7 +64,7 @@ static int dsi_calc_mnp(struct drm_i915_private *dev_priv, ...@@ -64,7 +64,7 @@ static int dsi_calc_mnp(struct drm_i915_private *dev_priv,
/* target_dsi_clk is expected in kHz */ /* target_dsi_clk is expected in kHz */
if (target_dsi_clk < 300000 || target_dsi_clk > 1150000) { if (target_dsi_clk < 300000 || target_dsi_clk > 1150000) {
DRM_ERROR("DSI CLK Out of Range\n"); drm_err(&dev_priv->drm, "DSI CLK Out of Range\n");
return -ECHRNG; return -ECHRNG;
} }
...@@ -126,7 +126,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder, ...@@ -126,7 +126,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,
ret = dsi_calc_mnp(dev_priv, config, dsi_clk); ret = dsi_calc_mnp(dev_priv, config, dsi_clk);
if (ret) { if (ret) {
DRM_DEBUG_KMS("dsi_calc_mnp failed\n"); drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n");
return ret; return ret;
} }
...@@ -138,8 +138,8 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder, ...@@ -138,8 +138,8 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,
config->dsi_pll.ctrl |= DSI_PLL_VCO_EN; config->dsi_pll.ctrl |= DSI_PLL_VCO_EN;
DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n", drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n",
config->dsi_pll.div, config->dsi_pll.ctrl); config->dsi_pll.div, config->dsi_pll.ctrl);
return 0; return 0;
} }
...@@ -149,7 +149,7 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder, ...@@ -149,7 +149,7 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder,
{ {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
DRM_DEBUG_KMS("\n"); drm_dbg_kms(&dev_priv->drm, "\n");
vlv_cck_get(dev_priv); vlv_cck_get(dev_priv);
...@@ -169,12 +169,12 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder, ...@@ -169,12 +169,12 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder,
DSI_PLL_LOCK, 20)) { DSI_PLL_LOCK, 20)) {
vlv_cck_put(dev_priv); vlv_cck_put(dev_priv);
DRM_ERROR("DSI PLL lock failed\n"); drm_err(&dev_priv->drm, "DSI PLL lock failed\n");
return; return;
} }
vlv_cck_put(dev_priv); vlv_cck_put(dev_priv);
DRM_DEBUG_KMS("DSI PLL locked\n"); drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n");
} }
void vlv_dsi_pll_disable(struct intel_encoder *encoder) void vlv_dsi_pll_disable(struct intel_encoder *encoder)
...@@ -182,7 +182,7 @@ void vlv_dsi_pll_disable(struct intel_encoder *encoder) ...@@ -182,7 +182,7 @@ void vlv_dsi_pll_disable(struct intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 tmp; u32 tmp;
DRM_DEBUG_KMS("\n"); drm_dbg_kms(&dev_priv->drm, "\n");
vlv_cck_get(dev_priv); vlv_cck_get(dev_priv);
...@@ -218,12 +218,14 @@ bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv) ...@@ -218,12 +218,14 @@ bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
val = intel_de_read(dev_priv, BXT_DSI_PLL_CTL); val = intel_de_read(dev_priv, BXT_DSI_PLL_CTL);
if (IS_GEMINILAKE(dev_priv)) { if (IS_GEMINILAKE(dev_priv)) {
if (!(val & BXT_DSIA_16X_MASK)) { if (!(val & BXT_DSIA_16X_MASK)) {
DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val); drm_dbg(&dev_priv->drm,
"Invalid PLL divider (%08x)\n", val);
enabled = false; enabled = false;
} }
} else { } else {
if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) { if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) {
DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val); drm_dbg(&dev_priv->drm,
"Invalid PLL divider (%08x)\n", val);
enabled = false; enabled = false;
} }
} }
...@@ -236,7 +238,7 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder) ...@@ -236,7 +238,7 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 val; u32 val;
DRM_DEBUG_KMS("\n"); drm_dbg_kms(&dev_priv->drm, "\n");
val = intel_de_read(dev_priv, BXT_DSI_PLL_ENABLE); val = intel_de_read(dev_priv, BXT_DSI_PLL_ENABLE);
val &= ~BXT_DSI_PLL_DO_ENABLE; val &= ~BXT_DSI_PLL_DO_ENABLE;
...@@ -248,7 +250,8 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder) ...@@ -248,7 +250,8 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder)
*/ */
if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE, if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE,
BXT_DSI_PLL_LOCKED, 1)) BXT_DSI_PLL_LOCKED, 1))
DRM_ERROR("Timeout waiting for PLL lock deassertion\n"); drm_err(&dev_priv->drm,
"Timeout waiting for PLL lock deassertion\n");
} }
u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
...@@ -263,7 +266,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, ...@@ -263,7 +266,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000;
int i; int i;
DRM_DEBUG_KMS("\n"); drm_dbg_kms(&dev_priv->drm, "\n");
vlv_cck_get(dev_priv); vlv_cck_get(dev_priv);
pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
...@@ -292,7 +295,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, ...@@ -292,7 +295,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
p--; p--;
if (!p) { if (!p) {
DRM_ERROR("wrong P1 divisor\n"); drm_err(&dev_priv->drm, "wrong P1 divisor\n");
return 0; return 0;
} }
...@@ -302,7 +305,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, ...@@ -302,7 +305,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
} }
if (i == ARRAY_SIZE(lfsr_converts)) { if (i == ARRAY_SIZE(lfsr_converts)) {
DRM_ERROR("wrong m_seed programmed\n"); drm_err(&dev_priv->drm, "wrong m_seed programmed\n");
return 0; return 0;
} }
...@@ -333,7 +336,7 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, ...@@ -333,7 +336,7 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp); pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
DRM_DEBUG_DRIVER("Calculated pclk=%u\n", pclk); drm_dbg(&dev_priv->drm, "Calculated pclk=%u\n", pclk);
return pclk; return pclk;
} }
...@@ -479,10 +482,11 @@ int bxt_dsi_pll_compute(struct intel_encoder *encoder, ...@@ -479,10 +482,11 @@ int bxt_dsi_pll_compute(struct intel_encoder *encoder,
} }
if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) { if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) {
DRM_ERROR("Cant get a suitable ratio from DSI PLL ratios\n"); drm_err(&dev_priv->drm,
"Cant get a suitable ratio from DSI PLL ratios\n");
return -ECHRNG; return -ECHRNG;
} else } else
DRM_DEBUG_KMS("DSI PLL calculation is Done!!\n"); drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n");
/* /*
* Program DSI ratio and Select MIPIC and MIPIA PLL output as 8x * Program DSI ratio and Select MIPIC and MIPIA PLL output as 8x
...@@ -508,7 +512,7 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder, ...@@ -508,7 +512,7 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder,
enum port port; enum port port;
u32 val; u32 val;
DRM_DEBUG_KMS("\n"); drm_dbg_kms(&dev_priv->drm, "\n");
/* Configure PLL vales */ /* Configure PLL vales */
intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl); intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);
...@@ -530,11 +534,12 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder, ...@@ -530,11 +534,12 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder,
/* Timeout and fail if PLL not locked */ /* Timeout and fail if PLL not locked */
if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE, if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE,
BXT_DSI_PLL_LOCKED, 1)) { BXT_DSI_PLL_LOCKED, 1)) {
DRM_ERROR("Timed out waiting for DSI PLL to lock\n"); drm_err(&dev_priv->drm,
"Timed out waiting for DSI PLL to lock\n");
return; return;
} }
DRM_DEBUG_KMS("DSI PLL locked\n"); drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n");
} }
void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port) void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
......
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