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Commit b3d6fd8f authored by Michael Srba's avatar Michael Srba Committed by Bjorn Andersson
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arm64: dts: qcom: msm8916: Disable coresight by default 

On some msm8916 devices, attempts at initializing coresight cause the boot to
fail. This was fixed by disabling the coresight-related nodes in the board dts
files. However, a cleaner approach was chosen for fixing the same issue on
msm8998: disabling coresight by default, and enabling it in board dts files
where desired.

This patch implements the same solution for msm8916, removes now redundant
overwrites in board specific dts files and and enables coresight in db410c's
board dts in order to keep the current behavior.

Fixes: b1fcc570 ("arm64: dts: qcom: msm8916: Add CTI options")
Signed-off-by: default avatarMichael Srba <michael.srba@seznam.cz>
Reviewed-by: default avatarJeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20200513184735.30104-1-michael.srba@seznam.czSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 9fc18435
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Showing with 56 additions and 46 deletions
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
View file @ b3d6fd8f
......@@ -519,6 +519,27 @@ mpps@a000 {
wcnss@a21b000 {
status = "okay";
};
tpiu@820000 { status = "okay"; };
funnel@821000 { status = "okay"; };
replicator@824000 { status = "okay"; };
etf@825000 { status = "okay"; };
etr@826000 { status = "okay"; };
funnel@841000 { status = "okay"; };
debug@850000 { status = "okay"; };
debug@852000 { status = "okay"; };
debug@854000 { status = "okay"; };
debug@856000 { status = "okay"; };
etm@85c000 { status = "okay"; };
etm@85d000 { status = "okay"; };
etm@85e000 { status = "okay"; };
etm@85f000 { status = "okay"; };
cti@810000 { status = "okay"; };
cti@811000 { status = "okay"; };
cti@858000 { status = "okay"; };
cti@859000 { status = "okay"; };
cti@85a000 { status = "okay"; };
cti@85b000 { status = "okay"; };
};
usb2513 {
......
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View file @ b3d6fd8f
......@@ -82,29 +82,6 @@ phy {
wcnss@a21b000 {
status = "okay";
};
/*
* Attempting to enable these devices causes a "synchronous
* external abort". Suspected cause is that the debug power
* domain is not enabled by default on this device.
* Disable these devices for now to avoid the crash.
*
* See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
*/
tpiu@820000 { status = "disabled"; };
funnel@821000 { status = "disabled"; };
replicator@824000 { status = "disabled"; };
etf@825000 { status = "disabled"; };
etr@826000 { status = "disabled"; };
funnel@841000 { status = "disabled"; };
debug@850000 { status = "disabled"; };
debug@852000 { status = "disabled"; };
debug@854000 { status = "disabled"; };
debug@856000 { status = "disabled"; };
etm@85c000 { status = "disabled"; };
etm@85d000 { status = "disabled"; };
etm@85e000 { status = "disabled"; };
etm@85f000 { status = "disabled"; };
};
// FIXME: Use extcon device provided by charger driver when available
......
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View file @ b3d6fd8f
......@@ -75,29 +75,6 @@ phy {
wcnss@a21b000 {
status = "okay";
};
/*
* Attempting to enable these devices causes a "synchronous
* external abort". Suspected cause is that the debug power
* domain is not enabled by default on this device.
* Disable these devices for now to avoid the crash.
*
* See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
*/
tpiu@820000 { status = "disabled"; };
funnel@821000 { status = "disabled"; };
replicator@824000 { status = "disabled"; };
etf@825000 { status = "disabled"; };
etr@826000 { status = "disabled"; };
funnel@841000 { status = "disabled"; };
debug@850000 { status = "disabled"; };
debug@852000 { status = "disabled"; };
debug@854000 { status = "disabled"; };
debug@856000 { status = "disabled"; };
etm@85c000 { status = "disabled"; };
etm@85d000 { status = "disabled"; };
etm@85e000 { status = "disabled"; };
etm@85f000 { status = "disabled"; };
};
gpio-keys {
......
arch/arm64/boot/dts/qcom/msm8916.dtsi
View file @ b3d6fd8f
......@@ -1258,6 +1258,8 @@ tpiu@820000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
tpiu_in: endpoint {
......@@ -1274,6 +1276,8 @@ funnel@821000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
......@@ -1313,6 +1317,8 @@ replicator@824000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
......@@ -1347,6 +1353,8 @@ etf@825000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
etf_in: endpoint {
......@@ -1371,6 +1379,8 @@ etr@826000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
etr_in: endpoint {
......@@ -1387,6 +1397,8 @@ funnel@841000 { /* APSS funnel only 4 inputs are used */
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
......@@ -1432,6 +1444,7 @@ debug@850000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
status = "disabled";
};
debug@852000 {
......@@ -1440,6 +1453,7 @@ debug@852000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
status = "disabled";
};
debug@854000 {
......@@ -1448,6 +1462,7 @@ debug@854000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
status = "disabled";
};
debug@856000 {
......@@ -1456,6 +1471,7 @@ debug@856000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
status = "disabled";
};
etm0: etm@85c000 {
......@@ -1468,6 +1484,8 @@ etm0: etm@85c000 {
cpu = <&CPU0>;
status = "disabled";
out-ports {
port {
etm0_out: endpoint {
......@@ -1487,6 +1505,8 @@ etm1: etm@85d000 {
cpu = <&CPU1>;
status = "disabled";
out-ports {
port {
etm1_out: endpoint {
......@@ -1506,6 +1526,8 @@ etm2: etm@85e000 {
cpu = <&CPU2>;
status = "disabled";
out-ports {
port {
etm2_out: endpoint {
......@@ -1525,6 +1547,8 @@ etm3: etm@85f000 {
cpu = <&CPU3>;
status = "disabled";
out-ports {
port {
etm3_out: endpoint {
......@@ -1542,6 +1566,8 @@ cti@810000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
status = "disabled";
};
/* CTI 1 - TPIU connections */
......@@ -1551,6 +1577,8 @@ cti@811000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
status = "disabled";
};
/* CTIs 2-11 - no information - not instantiated */
......@@ -1568,6 +1596,7 @@ cti@858000 {
cpu = <&CPU0>;
arm,cs-dev-assoc = <&etm0>;
status = "disabled";
};
/* CTI - CPU-1 */
......@@ -1581,6 +1610,8 @@ cti@859000 {
cpu = <&CPU1>;
arm,cs-dev-assoc = <&etm1>;
status = "disabled";
};
/* CTI - CPU-2 */
......@@ -1594,6 +1625,8 @@ cti@85a000 {
cpu = <&CPU2>;
arm,cs-dev-assoc = <&etm2>;
status = "disabled";
};
/* CTI - CPU-3 */
......@@ -1607,6 +1640,8 @@ cti@85b000 {
cpu = <&CPU3>;
arm,cs-dev-assoc = <&etm3>;
status = "disabled";
};
......
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