Commit b3fbfa23 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark

drm/msm/dpu: hw_blk: make dpu_hw_blk empty opaque structure

The code does not really use dpu_hw_blk fields, so drop them, making
dpu_hw_blk empty structure.
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210515190909.1809050-5-dmitry.baryshkov@linaro.orgReviewed-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent dfa35bac
...@@ -58,7 +58,6 @@ msm-y := \ ...@@ -58,7 +58,6 @@ msm-y := \
disp/dpu1/dpu_encoder_phys_cmd.o \ disp/dpu1/dpu_encoder_phys_cmd.o \
disp/dpu1/dpu_encoder_phys_vid.o \ disp/dpu1/dpu_encoder_phys_vid.o \
disp/dpu1/dpu_formats.o \ disp/dpu1/dpu_formats.o \
disp/dpu1/dpu_hw_blk.o \
disp/dpu1/dpu_hw_catalog.o \ disp/dpu1/dpu_hw_catalog.o \
disp/dpu1/dpu_hw_ctl.o \ disp/dpu1/dpu_hw_ctl.o \
disp/dpu1/dpu_hw_interrupts.o \ disp/dpu1/dpu_hw_interrupts.o \
......
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*/
#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
#include <linux/mutex.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include "dpu_hw_mdss.h"
#include "dpu_hw_blk.h"
/**
* dpu_hw_blk_init - initialize hw block object
* @hw_blk: pointer to hw block object
* @type: hw block type - enum dpu_hw_blk_type
* @id: instance id of the hw block
*/
void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id)
{
hw_blk->type = type;
hw_blk->id = id;
}
...@@ -19,9 +19,7 @@ struct dpu_hw_blk; ...@@ -19,9 +19,7 @@ struct dpu_hw_blk;
* @refcount: reference/usage count * @refcount: reference/usage count
*/ */
struct dpu_hw_blk { struct dpu_hw_blk {
u32 type; /* opaque */
int id;
}; };
void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id);
#endif /*_DPU_HW_BLK_H */ #endif /*_DPU_HW_BLK_H */
...@@ -613,8 +613,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx, ...@@ -613,8 +613,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
c->mixer_count = m->mixer_count; c->mixer_count = m->mixer_count;
c->mixer_hw_caps = m->mixer; c->mixer_hw_caps = m->mixer;
dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx);
return c; return c;
} }
......
...@@ -110,8 +110,6 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, ...@@ -110,8 +110,6 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx,
c->cap = cfg; c->cap = cfg;
_setup_dspp_ops(c, c->cap->features); _setup_dspp_ops(c, c->cap->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSPP, idx);
return c; return c;
} }
......
...@@ -325,8 +325,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, ...@@ -325,8 +325,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
c->mdss = m; c->mdss = m;
_setup_intf_ops(&c->ops, c->cap->features); _setup_intf_ops(&c->ops, c->cap->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx);
return c; return c;
} }
......
...@@ -182,8 +182,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, ...@@ -182,8 +182,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
c->cap = cfg; c->cap = cfg;
_setup_mixer_ops(m, &c->ops, c->cap->features); _setup_mixer_ops(m, &c->ops, c->cap->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx);
return c; return c;
} }
......
...@@ -79,8 +79,6 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, ...@@ -79,8 +79,6 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx,
c->caps = cfg; c->caps = cfg;
_setup_merge_3d_ops(c, c->caps->features); _setup_merge_3d_ops(c, c->caps->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_MERGE_3D, idx);
return c; return c;
} }
......
...@@ -282,8 +282,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, ...@@ -282,8 +282,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
c->caps = cfg; c->caps = cfg;
_setup_pingpong_ops(c, c->caps->features); _setup_pingpong_ops(c, c->caps->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx);
return c; return c;
} }
......
...@@ -733,8 +733,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, ...@@ -733,8 +733,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
hw_pipe->cap = cfg; hw_pipe->cap = cfg;
_setup_layer_ops(hw_pipe, hw_pipe->cap->features); _setup_layer_ops(hw_pipe, hw_pipe->cap->features);
dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx);
return hw_pipe; return hw_pipe;
} }
......
...@@ -322,8 +322,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, ...@@ -322,8 +322,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
mdp->caps = cfg; mdp->caps = cfg;
_setup_mdp_ops(&mdp->ops, mdp->caps->features); _setup_mdp_ops(&mdp->ops, mdp->caps->features);
dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx);
return mdp; return mdp;
} }
......
...@@ -428,7 +428,7 @@ static int _dpu_rm_reserve_ctls( ...@@ -428,7 +428,7 @@ static int _dpu_rm_reserve_ctls(
features = ctl->caps->features; features = ctl->caps->features;
has_split_display = BIT(DPU_CTL_SPLIT_DISPLAY) & features; has_split_display = BIT(DPU_CTL_SPLIT_DISPLAY) & features;
DPU_DEBUG("ctl %d caps 0x%lX\n", rm->ctl_blks[j]->id, features); DPU_DEBUG("ctl %d caps 0x%lX\n", j + CTL_0, features);
if (needs_split_display != has_split_display) if (needs_split_display != has_split_display)
continue; continue;
......
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