Commit b47068b4 authored by Takashi Iwai's avatar Takashi Iwai

Merge tag 'asoc-fix-v6.1-rc7' of...

Merge tag 'asoc-fix-v6.1-rc7' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.1

Some more fixes for v6.1, some of these are very old and were originally
intended to get sent for v5.18 but got lost in the shuffle when there
was an issue with Linus not liking my branching strategy and I rebuilt
bits of my workflow.  The ops changes have been validated by people
looking at real hardware and are how things getting dropped got noticed.
parents 9b84f0f7 3d1bb6cc
...@@ -143,7 +143,7 @@ static const struct snd_kcontrol_new cs42l51_snd_controls[] = { ...@@ -143,7 +143,7 @@ static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
0, 0xA0, 96, adc_att_tlv), 0, 0xA0, 96, adc_att_tlv),
SOC_DOUBLE_R_SX_TLV("PGA Volume", SOC_DOUBLE_R_SX_TLV("PGA Volume",
CS42L51_ALC_PGA_CTL, CS42L51_ALC_PGB_CTL, CS42L51_ALC_PGA_CTL, CS42L51_ALC_PGB_CTL,
0, 0x19, 30, pga_tlv), 0, 0x1A, 30, pga_tlv),
SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0), SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0), SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0), SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0),
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <dt-bindings/sound/tlv320adc3xxx.h> #include <dt-bindings/sound/tlv320adc3xxx.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/moduleparam.h> #include <linux/moduleparam.h>
#include <linux/io.h> #include <linux/io.h>
...@@ -1025,7 +1026,9 @@ static const struct gpio_chip adc3xxx_gpio_chip = { ...@@ -1025,7 +1026,9 @@ static const struct gpio_chip adc3xxx_gpio_chip = {
static void adc3xxx_free_gpio(struct adc3xxx *adc3xxx) static void adc3xxx_free_gpio(struct adc3xxx *adc3xxx)
{ {
#ifdef CONFIG_GPIOLIB
gpiochip_remove(&adc3xxx->gpio_chip); gpiochip_remove(&adc3xxx->gpio_chip);
#endif
} }
static void adc3xxx_init_gpio(struct adc3xxx *adc3xxx) static void adc3xxx_init_gpio(struct adc3xxx *adc3xxx)
......
...@@ -194,6 +194,25 @@ static int fsl_micfil_reset(struct device *dev) ...@@ -194,6 +194,25 @@ static int fsl_micfil_reset(struct device *dev)
if (ret) if (ret)
return ret; return ret;
/*
* SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined
* as non-volatile register, so SRES still remain in regmap
* cache after set, that every update of REG_MICFIL_CTRL1,
* software reset happens. so clear it explicitly.
*/
ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
MICFIL_CTRL1_SRES);
if (ret)
return ret;
/*
* Set SRES should clear CHnF flags, But even add delay here
* the CHnF may not be cleared sometimes, so clear CHnF explicitly.
*/
ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF);
if (ret)
return ret;
return 0; return 0;
} }
......
...@@ -452,7 +452,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, ...@@ -452,7 +452,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
val = ucontrol->value.integer.value[0]; val = ucontrol->value.integer.value[0];
if (mc->platform_max && val > mc->platform_max) if (mc->platform_max && val > mc->platform_max)
return -EINVAL; return -EINVAL;
if (val > max - min) if (val > max)
return -EINVAL; return -EINVAL;
val_mask = mask << shift; val_mask = mask << shift;
val = (val + min) & mask; val = (val + min) & mask;
...@@ -464,10 +464,15 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, ...@@ -464,10 +464,15 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
ret = err; ret = err;
if (snd_soc_volsw_is_stereo(mc)) { if (snd_soc_volsw_is_stereo(mc)) {
unsigned int val2; unsigned int val2 = ucontrol->value.integer.value[1];
if (mc->platform_max && val2 > mc->platform_max)
return -EINVAL;
if (val2 > max)
return -EINVAL;
val_mask = mask << rshift; val_mask = mask << rshift;
val2 = (ucontrol->value.integer.value[1] + min) & mask; val2 = (val2 + min) & mask;
val2 = val2 << rshift; val2 = val2 << rshift;
err = snd_soc_component_update_bits(component, reg2, val_mask, err = snd_soc_component_update_bits(component, reg2, val_mask,
......
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