Commit b494ba5a authored by Voon Weifeng's avatar Voon Weifeng Committed by David S. Miller

net: stmmac: enable MTL ECC Error Address Status Over-ride by default

Turn on the MEEAO field of MTL_ECC_Control_Register by default.

As the MTL ECC Error Address Status Over-ride(MEEAO) is set by default,
the following error address fields will hold the last valid address
where the error is detected.
Signed-off-by: default avatarVoon Weifeng <weifeng.voon@intel.com>
Signed-off-by: default avatarTan Tee Min <tee.min.tan@intel.com>
Co-developed-by: default avatarWong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: default avatarWong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 77890db1
...@@ -192,6 +192,7 @@ int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp) ...@@ -192,6 +192,7 @@ int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp)
/* 1. Enable Safety Features */ /* 1. Enable Safety Features */
value = readl(ioaddr + MTL_ECC_CONTROL); value = readl(ioaddr + MTL_ECC_CONTROL);
value |= MEEAO; /* MTL ECC Error Addr Status Override */
value |= TSOEE; /* TSO ECC */ value |= TSOEE; /* TSO ECC */
value |= MRXPEE; /* MTL RX Parser ECC */ value |= MRXPEE; /* MTL RX Parser ECC */
value |= MESTEE; /* MTL EST ECC */ value |= MESTEE; /* MTL EST ECC */
......
...@@ -98,6 +98,7 @@ ...@@ -98,6 +98,7 @@
#define ADDR GENMASK(15, 0) #define ADDR GENMASK(15, 0)
#define MTL_RXP_IACC_DATA 0x00000cb4 #define MTL_RXP_IACC_DATA 0x00000cb4
#define MTL_ECC_CONTROL 0x00000cc0 #define MTL_ECC_CONTROL 0x00000cc0
#define MEEAO BIT(8)
#define TSOEE BIT(4) #define TSOEE BIT(4)
#define MRXPEE BIT(3) #define MRXPEE BIT(3)
#define MESTEE BIT(2) #define MESTEE BIT(2)
......
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