Commit b496dc90 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab

media: ti-vpe: cal: Don't pass format to cal_ctx_wr_dma_config()

The cal_ctx_wr_dma_config() function has access to the context, there's
no need to give it format-related values retrieved from the context.
Access the values internally, and reword internal comments. The comment
regarding the CAL_WR_DMA_OFST register not being well understood is
dropped, as the datasheet explicitly documents it as "Offset between two
consecutive line starts".
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent cc548feb
...@@ -516,8 +516,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) ...@@ -516,8 +516,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count)
cal_ctx_csi2_config(ctx); cal_ctx_csi2_config(ctx);
cal_ctx_pix_proc_config(ctx); cal_ctx_pix_proc_config(ctx);
cal_ctx_wr_dma_config(ctx, ctx->v_fmt.fmt.pix.bytesperline, cal_ctx_wr_dma_config(ctx);
ctx->v_fmt.fmt.pix.height);
cal_camerarx_enable_irqs(ctx->phy); cal_camerarx_enable_irqs(ctx->phy);
......
...@@ -356,14 +356,15 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx) ...@@ -356,14 +356,15 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx)
cal_read(ctx->cal, CAL_PIX_PROC(ctx->index))); cal_read(ctx->cal, CAL_PIX_PROC(ctx->index)));
} }
void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, void cal_ctx_wr_dma_config(struct cal_ctx *ctx)
unsigned int height)
{ {
unsigned int stride = ctx->v_fmt.fmt.pix.bytesperline;
u32 val; u32 val;
val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)); val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index));
cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK); cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK);
cal_set_field(&val, height, CAL_WR_DMA_CTRL_YSIZE_MASK); cal_set_field(&val, ctx->v_fmt.fmt.pix.height,
CAL_WR_DMA_CTRL_YSIZE_MASK);
cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT, cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT,
CAL_WR_DMA_CTRL_DTAG_MASK); CAL_WR_DMA_CTRL_DTAG_MASK);
cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST, cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST,
...@@ -375,14 +376,8 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, ...@@ -375,14 +376,8 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->index, ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->index,
cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index))); cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)));
/* cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->index),
* width/16 not sure but giving it a whirl. stride / 16, CAL_WR_DMA_OFST_MASK);
* zero does not work right
*/
cal_write_field(ctx->cal,
CAL_WR_DMA_OFST(ctx->index),
(width / 16),
CAL_WR_DMA_OFST_MASK);
ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->index, ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->index,
cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index))); cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index)));
...@@ -390,11 +385,11 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, ...@@ -390,11 +385,11 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width,
/* 64 bit word means no skipping */ /* 64 bit word means no skipping */
cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK); cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK);
/* /*
* (width*8)/64 this should be size of an entire line * The XSIZE field is expressed in 64-bit units and prevents overflows
* in 64bit word but 0 means all data until the end * in case of synchronization issues by limiting the number of bytes
* is detected automagically * written per line.
*/ */
cal_set_field(&val, (width / 8), CAL_WR_DMA_XSIZE_MASK); cal_set_field(&val, stride / 8, CAL_WR_DMA_XSIZE_MASK);
cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val); cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val);
ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->index, ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->index,
cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index))); cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index)));
......
...@@ -273,8 +273,7 @@ void cal_camerarx_destroy(struct cal_camerarx *phy); ...@@ -273,8 +273,7 @@ void cal_camerarx_destroy(struct cal_camerarx *phy);
void cal_ctx_csi2_config(struct cal_ctx *ctx); void cal_ctx_csi2_config(struct cal_ctx *ctx);
void cal_ctx_pix_proc_config(struct cal_ctx *ctx); void cal_ctx_pix_proc_config(struct cal_ctx *ctx);
void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, void cal_ctx_wr_dma_config(struct cal_ctx *ctx);
unsigned int height);
void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr); void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr);
int cal_ctx_v4l2_register(struct cal_ctx *ctx); int cal_ctx_v4l2_register(struct cal_ctx *ctx);
......
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