Commit b54ef381 authored by Venkata Narendra Kumar Gutta's avatar Venkata Narendra Kumar Gutta Committed by Andy Gross

dt-bindings: msm: Update documentation of qcom,llcc

Add reg-names and interrupts for LLCC documentation and the usage
examples. llcc broadcast base is added in addition to llcc base,
which is used for llcc broadcast writes.
Signed-off-by: default avatarVenkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 27450653
...@@ -16,11 +16,26 @@ Properties: ...@@ -16,11 +16,26 @@ Properties:
- reg: - reg:
Usage: required Usage: required
Value Type: <prop-encoded-array> Value Type: <prop-encoded-array>
Definition: Start address and the the size of the register region. Definition: The first element specifies the llcc base start address and
the size of the register region. The second element specifies
the llcc broadcast base address and size of the register region.
- reg-names:
Usage: required
Value Type: <stringlist>
Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base".
- interrupts:
Usage: required
Definition: The interrupt is associated with the llcc edac device.
It's used for llcc cache single and double bit error detection
and reporting.
Example: Example:
cache-controller@1100000 { cache-controller@1100000 {
compatible = "qcom,sdm845-llcc"; compatible = "qcom,sdm845-llcc";
reg = <0x1100000 0x250000>; reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
reg-names = "llcc_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
}; };
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