Commit b5e2a94b authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] sn: Delete unused code in pcibr_slot.c

From: Pat Gefre <pfg@sgi.com>

Delete unused code in pcibr_slot.c
parent 477a5076
...@@ -46,15 +46,6 @@ cfg_p pcibr_find_capability(cfg_p, unsigned); ...@@ -46,15 +46,6 @@ cfg_p pcibr_find_capability(cfg_p, unsigned);
extern uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned); extern uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned);
void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t); void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t);
int pcibr_slot_attach(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot,
int drv_flags, char *l1_msg, int *sub_errorp);
int pcibr_slot_info_return(pcibr_soft_t pcibr_soft, pciio_slot_t slot,
pcibr_slot_info_resp_t respp);
extern vertex_hdl_t baseio_pci_vhdl;
int scsi_ctlr_nums_add(vertex_hdl_t, vertex_hdl_t);
/* /*
* PCI-X Max Outstanding Split Transactions translation array and Max Memory * PCI-X Max Outstanding Split Transactions translation array and Max Memory
...@@ -83,223 +74,6 @@ char *pci_space_name[] = {"NONE", ...@@ -83,223 +74,6 @@ char *pci_space_name[] = {"NONE",
"", "",
"BAD"}; "BAD"};
void
pcibr_slot_func_info_return(pcibr_info_h pcibr_infoh,
int func,
pcibr_slot_func_info_resp_t funcp)
{
pcibr_info_t pcibr_info = pcibr_infoh[func];
int win;
funcp->resp_f_status = 0;
if (!pcibr_info) {
return;
}
funcp->resp_f_status |= FUNC_IS_VALID;
#if defined(SUPPORT_PRINTING_V_FORMAT)
sprintf(funcp->resp_f_slot_name, "%v", pcibr_info->f_vertex);
#endif
funcp->resp_f_bus = pcibr_info->f_bus;
funcp->resp_f_slot = PCIBR_INFO_SLOT_GET_EXT(pcibr_info);
funcp->resp_f_func = pcibr_info->f_func;
#if defined(SUPPORT_PRINTING_V_FORMAT)
sprintf(funcp->resp_f_master_name, "%v", pcibr_info->f_master);
#endif
funcp->resp_f_pops = pcibr_info->f_pops;
funcp->resp_f_efunc = pcibr_info->f_efunc;
funcp->resp_f_einfo = pcibr_info->f_einfo;
funcp->resp_f_vendor = pcibr_info->f_vendor;
funcp->resp_f_device = pcibr_info->f_device;
for(win = 0 ; win < 6 ; win++) {
funcp->resp_f_window[win].resp_w_base =
pcibr_info->f_window[win].w_base;
funcp->resp_f_window[win].resp_w_size =
pcibr_info->f_window[win].w_size;
sprintf(funcp->resp_f_window[win].resp_w_space,
"%s",
pci_space_name[pcibr_info->f_window[win].w_space]);
}
funcp->resp_f_rbase = pcibr_info->f_rbase;
funcp->resp_f_rsize = pcibr_info->f_rsize;
for (win = 0 ; win < 4; win++) {
funcp->resp_f_ibit[win] = pcibr_info->f_ibit[win];
}
funcp->resp_f_att_det_error = pcibr_info->f_att_det_error;
}
int
pcibr_slot_info_return(pcibr_soft_t pcibr_soft,
pciio_slot_t slot,
pcibr_slot_info_resp_t respp)
{
pcibr_soft_slot_t pss;
int func;
bridge_t *bridge = pcibr_soft->bs_base;
reg_p b_respp;
pcibr_slot_info_resp_t slotp;
pcibr_slot_func_info_resp_t funcp;
slotp = kmalloc(sizeof(*slotp), GFP_KERNEL);
if (slotp == NULL) {
return(ENOMEM);
}
pss = &pcibr_soft->bs_slot[slot];
slotp->resp_bs_bridge_mode = pcibr_soft->bs_bridge_mode;
slotp->resp_bs_bridge_type = pcibr_soft->bs_bridge_type;
slotp->resp_has_host = pss->has_host;
slotp->resp_host_slot = pss->host_slot;
#if defined(SUPPORT_PRINTING_V_FORMAT)
sprintf(slotp->resp_slot_conn_name, "%v", pss->slot_conn);
#else
sprintf(slotp->resp_slot_conn_name, "%p", (void *)pss->slot_conn);
#endif
slotp->resp_slot_status = pss->slot_status;
slotp->resp_l1_bus_num = pcibr_widget_to_bus(pcibr_soft->bs_vhdl);
slotp->resp_bss_ninfo = pss->bss_ninfo;
for (func = 0; func < pss->bss_ninfo; func++) {
funcp = &(slotp->resp_func[func]);
pcibr_slot_func_info_return(pss->bss_infos, func, funcp);
}
sprintf(slotp->resp_bss_devio_bssd_space, "%s",
pci_space_name[pss->bss_devio.bssd_space]);
slotp->resp_bss_devio_bssd_base = pss->bss_devio.bssd_base;
slotp->resp_bss_device = pss->bss_device;
slotp->resp_bss_pmu_uctr = pss->bss_pmu_uctr;
slotp->resp_bss_d32_uctr = pss->bss_d32_uctr;
slotp->resp_bss_d64_uctr = pss->bss_d64_uctr;
slotp->resp_bss_d64_base = pss->bss_d64_base;
slotp->resp_bss_d64_flags = pss->bss_d64_flags;
slotp->resp_bss_d32_base = pss->bss_d32_base;
slotp->resp_bss_d32_flags = pss->bss_d32_flags;
slotp->resp_bss_ext_ates_active = pss->bss_ext_ates_active;
slotp->resp_bss_cmd_pointer = pss->bss_cmd_pointer;
slotp->resp_bss_cmd_shadow = pss->bss_cmd_shadow;
slotp->resp_bs_rrb_valid = pcibr_soft->bs_rrb_valid[slot][VCHAN0];
slotp->resp_bs_rrb_valid_v1 = pcibr_soft->bs_rrb_valid[slot][VCHAN1];
slotp->resp_bs_rrb_valid_v2 = pcibr_soft->bs_rrb_valid[slot][VCHAN2];
slotp->resp_bs_rrb_valid_v3 = pcibr_soft->bs_rrb_valid[slot][VCHAN3];
slotp->resp_bs_rrb_res = pcibr_soft->bs_rrb_res[slot];
if (slot & 1) {
b_respp = &bridge->b_odd_resp;
} else {
b_respp = &bridge->b_even_resp;
}
slotp->resp_b_resp = *b_respp;
slotp->resp_b_int_device = bridge->b_int_device;
slotp->resp_p_int_enable = bridge->p_int_enable_64;
slotp->resp_p_int_host = bridge->p_int_addr_64[slot];
if (copy_to_user(respp, respp, sizeof(*respp))) {
return(EFAULT);
}
kfree(slotp);
return(0);
}
/*
* pcibr_slot_query
* Return information about the PCI slot maintained by the infrastructure.
* Information is requested in the request structure.
*
* Information returned in the response structure:
* Slot hwgraph name
* Vendor/Device info
* Base register info
* Interrupt mapping from device pins to the bridge pins
* Devio register
* Software RRB info
* RRB register info
* Host/Gues info
* PCI Bus #,slot #, function #
* Slot provider hwgraph name
* Provider Functions
* Error handler
* DMA mapping usage counters
* DMA direct translation info
* External SSRAM workaround info
*/
int
pcibr_slot_query(vertex_hdl_t pcibr_vhdl, pcibr_slot_req_t reqp)
{
pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
pciio_slot_t slot;
pciio_slot_t tmp_slot;
pcibr_slot_info_resp_t respp = reqp->req_respp.query;
int size = reqp->req_size;
int error = 0;
/* Make sure that we are dealing with a bridge device vertex */
if (!pcibr_soft) {
return(PCI_NOT_A_BRIDGE);
}
/* req_slot is the 'external' slot number, convert for internal use */
slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft, reqp->req_slot);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HOTPLUG, pcibr_vhdl,
"pcibr_slot_query: pcibr_soft=0x%x, slot=%d, reqp=0x%x\n",
pcibr_soft, slot, reqp));
/* Make sure that we have a valid PCI slot number or PCIIO_SLOT_NONE */
if ((!PCIBR_VALID_SLOT(pcibr_soft, slot)) && (slot != PCIIO_SLOT_NONE)) {
return(PCI_NOT_A_SLOT);
}
/* Return information for the requested PCI slot */
if (slot != PCIIO_SLOT_NONE) {
if (size < sizeof(*respp)) {
return(PCI_RESP_AREA_TOO_SMALL);
}
error = pcibr_slot_info_return(pcibr_soft, slot, respp);
return(error);
}
/* Return information for all the slots */
for (tmp_slot = pcibr_soft->bs_min_slot;
tmp_slot < PCIBR_NUM_SLOTS(pcibr_soft); tmp_slot++) {
if (size < sizeof(*respp)) {
return(PCI_RESP_AREA_TOO_SMALL);
}
error = pcibr_slot_info_return(pcibr_soft, tmp_slot, respp);
if (error) {
return(error);
}
++respp;
size -= sizeof(*respp);
}
return(error);
}
/* /*
* pcibr_slot_info_init * pcibr_slot_info_init
* Probe for this slot and see if it is populated. * Probe for this slot and see if it is populated.
......
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