Commit b75d59b8 authored by David S. Miller's avatar David S. Miller

[TG3]: Recognize all onboard Sun variants, not just 5704.

Based upon a report from Matthias Merz.
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7850bacb
......@@ -3702,7 +3702,7 @@ static int tg3_chip_reset(struct tg3 *tp)
u32 flags_save;
int i;
if (!(tp->tg3_flags2 & TG3_FLG2_SUN_5704))
if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X))
tg3_nvram_lock(tp);
/*
......@@ -3833,7 +3833,7 @@ static int tg3_chip_reset(struct tg3 *tp)
udelay(10);
}
if (i >= 100000 &&
!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) {
printk(KERN_ERR PFX "tg3_reset_hw timed out for %s, "
"firmware will not restart magic=%08x\n",
tp->dev->name, val);
......@@ -6803,7 +6803,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
{
int j;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704)
if (tp->tg3_flags2 & TG3_FLG2_SUN_570X)
return;
tw32_f(GRC_EEPROM_ADDR,
......@@ -6890,8 +6890,8 @@ static int __devinit tg3_nvram_read(struct tg3 *tp,
{
int i;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
printk(KERN_ERR PFX "Attempt to do nvram_read on Sun 5704\n");
if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) {
printk(KERN_ERR PFX "Attempt to do nvram_read on Sun 570X\n");
return -EINVAL;
}
......@@ -7226,11 +7226,11 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
unsigned char vpd_data[256];
int i;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) {
/* Sun decided not to put the necessary bits in the
* NVRAM of their onboard tg3 parts :(
*/
strcpy(tp->board_part_number, "Sun 5704");
strcpy(tp->board_part_number, "Sun 570X");
return;
}
......@@ -7291,27 +7291,21 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
}
#ifdef CONFIG_SPARC64
static int __devinit tg3_is_sun_5704(struct tg3 *tp)
static int __devinit tg3_is_sun_570X(struct tg3 *tp)
{
struct pci_dev *pdev = tp->pdev;
struct pcidev_cookie *pcp = pdev->sysdata;
if (pcp != NULL) {
int node = pcp->prom_node;
u32 venid, devid;
u32 venid;
int err;
err = prom_getproperty(node, "subsystem-vendor-id",
(char *) &venid, sizeof(venid));
if (err == 0 || err == -1)
return 0;
err = prom_getproperty(node, "subsystem-id",
(char *) &devid, sizeof(devid));
if (err == 0 || err == -1)
return 0;
if (venid == PCI_VENDOR_ID_SUN &&
devid == PCI_DEVICE_ID_TIGON3_5704)
if (venid == PCI_VENDOR_ID_SUN)
return 1;
}
return 0;
......@@ -7328,8 +7322,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
int err;
#ifdef CONFIG_SPARC64
if (tg3_is_sun_5704(tp))
tp->tg3_flags2 |= TG3_FLG2_SUN_5704;
if (tg3_is_sun_570X(tp))
tp->tg3_flags2 |= TG3_FLG2_SUN_570X;
#endif
/* If we have an AMD 762 or Intel ICH/ICH0/ICH2 chipset, write
......@@ -7711,7 +7705,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
mac_offset = 0x7c;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
!(tp->tg3_flags & TG3_FLG2_SUN_5704)) {
!(tp->tg3_flags & TG3_FLG2_SUN_570X)) {
if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
mac_offset = 0xcc;
if (tg3_nvram_lock(tp))
......@@ -7733,7 +7727,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
dev->dev_addr[5] = (lo >> 0) & 0xff;
}
/* Next, try NVRAM. */
else if (!(tp->tg3_flags & TG3_FLG2_SUN_5704) &&
else if (!(tp->tg3_flags & TG3_FLG2_SUN_570X) &&
!tg3_nvram_read(tp, mac_offset + 0, &hi) &&
!tg3_nvram_read(tp, mac_offset + 4, &lo)) {
dev->dev_addr[0] = ((hi >> 16) & 0xff);
......
......@@ -2075,7 +2075,7 @@ struct tg3 {
#define TG3_FLAG_INIT_COMPLETE 0x80000000
u32 tg3_flags2;
#define TG3_FLG2_RESTART_TIMER 0x00000001
#define TG3_FLG2_SUN_5704 0x00000002
#define TG3_FLG2_SUN_570X 0x00000002
#define TG3_FLG2_NO_ETH_WIRE_SPEED 0x00000004
#define TG3_FLG2_IS_5788 0x00000008
#define TG3_FLG2_MAX_RXPEND_64 0x00000010
......
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