Merge branch 'pci/controller/brcmstb'

- Change DT binding maintainer to Jim Quinlan (Jim Quinlan)

- Add DT binding maxItems for reset controllers (Jim Quinlan)

- Refactor .probe() error handling (Jim Quinlan)

- Use the 'bridge' reset method if described in the DT (Jim Quinlan)

- Use the 'swinit' reset method if described in the DT (Jim Quinlan)

- Add SoC-specific HARD_DEBUG, INTR2_CPU_BASE register offsets (Jim
  Quinlan)

- Drop unused RGR1_SW_INIT_1_INIT_MASK, RGR1_SW_INIT_1_INIT_SHIFT offsets
  (Jim Quinlan)

- Add 'has_phy' so the existence of a 'rescal' reset controller doesn't
  imply software control of it (Jim Quinlan)

- Add support for many inbound DMA windows (Jim Quinlan)

- Check return values of all reset_control_*() calls (Jim Quinlan)

- Rename SoC 'type' to 'soc_base' express the fact that SoCs come in
  families of multiple similar devices (Jim Quinlan)

- Add Broadcom 7712 DT description and driver support (Jim Quinlan)

- Sort enums, pcie_offsets[], pcie_cfg_data, .compatible strings for
  maintainability (Bjorn Helgaas)

* pci/controller/brcmstb:
  PCI: brcmstb: Sort enums, pcie_offsets[], pcie_cfg_data, .compatible strings
  PCI: brcmstb: Enable 7712 SoCs
  PCI: brcmstb: Change field name from 'type' to 'soc_base'
  PCI: brcmstb: Check return value of all reset_control_* calls
  PCI: brcmstb: Refactor for chips with many regular inbound windows
  PCI: brcmstb: Don't conflate the reset rescal with PHY ctrl
  PCI: brcmstb: Remove two unused constants from driver
  PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific
  PCI: brcmstb: Use swinit reset if available
  PCI: brcmstb: Use bridge reset if available
  PCI: brcmstb: Use common error handling code in brcm_pcie_probe()
  dt-bindings: PCI: brcm,stb-pcie: Add 7712 SoC description
  dt-bindings: PCI: brcm,stb-pcie: Use maxItems for reset controllers
  dt-bindings: PCI: brcm,stb-pcie: Change brcmstb maintainer and cleanup

Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Brcmstb PCIe Host Controller
 
 maintainers:
-  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+  - Jim Quinlan <james.quinlan@broadcom.com>
 
 properties:
   compatible:
@@ -16,11 +16,12 @@ properties:
           - brcm,bcm2711-pcie # The Raspberry Pi 4
           - brcm,bcm4908-pcie
           - brcm,bcm7211-pcie # Broadcom STB version of RPi4
-          - brcm,bcm7278-pcie # Broadcom 7278 Arm
           - brcm,bcm7216-pcie # Broadcom 7216 Arm
-          - brcm,bcm7445-pcie # Broadcom 7445 Arm
+          - brcm,bcm7278-pcie # Broadcom 7278 Arm
           - brcm,bcm7425-pcie # Broadcom 7425 MIPs
           - brcm,bcm7435-pcie # Broadcom 7435 MIPs
+          - brcm,bcm7445-pcie # Broadcom 7445 Arm
+          - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
 
   reg:
     maxItems: 1
@@ -95,6 +96,14 @@ properties:
       minItems: 1
       maxItems: 3
 
+  resets:
+    minItems: 1
+    maxItems: 3
+
+  reset-names:
+    minItems: 1
+    maxItems: 3
+
 required:
   - compatible
   - reg
@@ -118,8 +127,7 @@ allOf:
     then:
       properties:
         resets:
-          items:
-            - description: reset controller handling the PERST# signal
+          maxItems: 1
 
         reset-names:
           items:
@@ -136,12 +144,32 @@ allOf:
     then:
       properties:
         resets:
+          maxItems: 1
+
+        reset-names:
           items:
-            - description: phandle pointing to the RESCAL reset controller
+            - const: rescal
+
+      required:
+        - resets
+        - reset-names
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: brcm,bcm7712-pcie
+    then:
+      properties:
+        resets:
+          minItems: 3
+          maxItems: 3
 
         reset-names:
           items:
             - const: rescal
+            - const: bridge
+            - const: swinit
 
       required:
         - resets