Commit b8d20e06 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Greg Kroah-Hartman

serial: 8250_uniphier: add earlycon support

This reuses the code of drivers/tty/serial/8250/8250_early.c except

  - Overwrite device->port.iotype and device->port.regshift for
    UPIO_MEM32 because of_setup_earlycon() has set them for UPIO_MEM.

  - Set device->baud to zero to prevent early8250_setup() from
    initializing the divisor register because port->uartclk does not
    match the frequency expected by this hardware.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: default avatarPeter Hurley <peter@hurleysoftware.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d72d391c
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
*/ */
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/console.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/of.h> #include <linux/of.h>
...@@ -34,6 +35,29 @@ struct uniphier8250_priv { ...@@ -34,6 +35,29 @@ struct uniphier8250_priv {
spinlock_t atomic_write_lock; spinlock_t atomic_write_lock;
}; };
#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init uniphier_early_console_setup(struct earlycon_device *device,
const char *options)
{
if (!device->port.membase)
return -ENODEV;
/* This hardware always expects MMIO32 register interface. */
device->port.iotype = UPIO_MEM32;
device->port.regshift = 2;
/*
* Do not touch the divisor register in early_serial8250_setup();
* we assume it has been initialized by a boot loader.
*/
device->baud = 0;
return early_serial8250_setup(device, options);
}
OF_EARLYCON_DECLARE(uniphier, "socionext,uniphier-uart",
uniphier_early_console_setup);
#endif
/* /*
* The register map is slightly different from that of 8250. * The register map is slightly different from that of 8250.
* IO callbacks must be overridden for correct access to FCR, LCR, and MCR. * IO callbacks must be overridden for correct access to FCR, LCR, and MCR.
......
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