Commit b8e6aec1 authored by Mario Limonciello's avatar Mario Limonciello Committed by Alex Deucher

drm/amd: Drop all hand-built MIN and MAX macros in the amdgpu base driver

Several files declare MIN() or MAX() macros that ignore the types of the
values being compared.  Drop these macros and switch to min() min_t(),
and max() from `linux/minmax.h`.
Suggested-by: default avatarHamza Mahfooz <Hamza.Mahfooz@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7752ccf8
......@@ -1328,8 +1328,6 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
for (i = ffs(inst_mask); i-- != 0; \
i = ffs(inst_mask & BIT_MASK_UPPER(i + 1)))
#define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
/* Common functions */
bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
......
......@@ -6600,7 +6600,7 @@ static int si_dpm_get_fan_speed_pwm(void *handle,
tmp64 = (u64)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((u32)tmp64, 255);
*speed = min_t(u32, tmp64, 255);
return 0;
}
......
......@@ -72,7 +72,7 @@ int smu7_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr,
tmp64 = (uint64_t)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((uint32_t)tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
return 0;
}
......@@ -210,7 +210,7 @@ int smu7_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr,
if (hwmgr->thermal_controller.fanInfo.bNoFan)
return 0;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
smu7_fan_ctrl_stop_smc_fan_control(hwmgr);
......
......@@ -81,7 +81,7 @@ int vega10_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr,
tmp64 = (uint64_t)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((uint32_t)tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
return 0;
}
......@@ -255,7 +255,7 @@ int vega10_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr,
if (hwmgr->thermal_controller.fanInfo.bNoFan)
return 0;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
......
......@@ -131,7 +131,7 @@ int vega20_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr,
tmp64 = (uint64_t)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((uint32_t)tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
return 0;
}
......@@ -144,7 +144,7 @@ int vega20_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr,
uint32_t duty;
uint64_t tmp64;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
vega20_fan_ctrl_stop_smc_fan_control(hwmgr);
......
......@@ -1203,7 +1203,7 @@ static int arcturus_set_fan_speed_pwm(struct smu_context *smu,
uint32_t duty100, duty;
uint64_t tmp64;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1_ARCT),
CG_FDO_CTRL1, FMAX_DUTY100);
......@@ -1267,7 +1267,7 @@ static int arcturus_get_fan_speed_pwm(struct smu_context *smu,
if (duty100) {
tmp64 = (uint64_t)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((uint32_t)tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
} else {
*speed = 0;
}
......
......@@ -2089,8 +2089,6 @@ static int sienna_cichlid_display_disable_memory_clock_switch(struct smu_context
return ret;
}
#define MAX(a, b) ((a) > (b) ? (a) : (b))
static int sienna_cichlid_update_pcie_parameters(struct smu_context *smu,
uint8_t pcie_gen_cap,
uint8_t pcie_width_cap)
......@@ -2106,12 +2104,12 @@ static int sienna_cichlid_update_pcie_parameters(struct smu_context *smu,
GET_PPTABLE_MEMBER(PcieGenSpeed, &table_member1);
GET_PPTABLE_MEMBER(PcieLaneCount, &table_member2);
min_gen_speed = MAX(0, table_member1[0]);
max_gen_speed = MIN(pcie_gen_cap, table_member1[1]);
min_gen_speed = max_t(uint8_t, 0, table_member1[0]);
max_gen_speed = min(pcie_gen_cap, table_member1[1]);
min_gen_speed = min_gen_speed > max_gen_speed ?
max_gen_speed : min_gen_speed;
min_lane_width = MAX(1, table_member2[0]);
max_lane_width = MIN(pcie_width_cap, table_member2[1]);
min_lane_width = max_t(uint8_t, 1, table_member2[0]);
max_lane_width = min(pcie_width_cap, table_member2[1]);
min_lane_width = min_lane_width > max_lane_width ?
max_lane_width : min_lane_width;
......
......@@ -1174,7 +1174,7 @@ smu_v11_0_set_fan_speed_pwm(struct smu_context *smu, uint32_t speed)
uint32_t duty100, duty;
uint64_t tmp64;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),
CG_FDO_CTRL1, FMAX_DUTY100);
......@@ -1249,7 +1249,7 @@ int smu_v11_0_get_fan_speed_pwm(struct smu_context *smu,
tmp64 = (uint64_t)duty * 255;
do_div(tmp64, duty100);
*speed = MIN((uint32_t)tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
return 0;
}
......
......@@ -1170,7 +1170,7 @@ int smu_v13_0_set_fan_speed_pwm(struct smu_context *smu,
uint32_t duty100, duty;
uint64_t tmp64;
speed = MIN(speed, 255);
speed = min_t(uint32_t, speed, 255);
if (smu_v13_0_auto_fan_control(smu, 0))
return -EINVAL;
......
......@@ -1998,7 +1998,6 @@ static int smu_v13_0_0_get_thermal_temperature_range(struct smu_context *smu,
return 0;
}
#define MAX(a, b) ((a) > (b) ? (a) : (b))
static ssize_t smu_v13_0_0_get_gpu_metrics(struct smu_context *smu,
void **table)
{
......@@ -2022,12 +2021,12 @@ static ssize_t smu_v13_0_0_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->temperature_mem = metrics->AvgTemperature[TEMP_MEM];
gpu_metrics->temperature_vrgfx = metrics->AvgTemperature[TEMP_VR_GFX];
gpu_metrics->temperature_vrsoc = metrics->AvgTemperature[TEMP_VR_SOC];
gpu_metrics->temperature_vrmem = MAX(metrics->AvgTemperature[TEMP_VR_MEM0],
gpu_metrics->temperature_vrmem = max(metrics->AvgTemperature[TEMP_VR_MEM0],
metrics->AvgTemperature[TEMP_VR_MEM1]);
gpu_metrics->average_gfx_activity = metrics->AverageGfxActivity;
gpu_metrics->average_umc_activity = metrics->AverageUclkActivity;
gpu_metrics->average_mm_activity = MAX(metrics->Vcn0ActivityPercentage,
gpu_metrics->average_mm_activity = max(metrics->Vcn0ActivityPercentage,
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
......@@ -2286,7 +2285,7 @@ static int smu_v13_0_0_get_fan_speed_pwm(struct smu_context *smu,
}
/* Convert the PMFW output which is in percent to pwm(255) based */
*speed = MIN(*speed * 255 / 100, 255);
*speed = min(*speed * 255 / 100, (uint32_t)255);
return 0;
}
......
......@@ -1946,7 +1946,6 @@ static int smu_v13_0_7_get_thermal_temperature_range(struct smu_context *smu,
return 0;
}
#define MAX(a, b) ((a) > (b) ? (a) : (b))
static ssize_t smu_v13_0_7_get_gpu_metrics(struct smu_context *smu,
void **table)
{
......@@ -1970,12 +1969,12 @@ static ssize_t smu_v13_0_7_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->temperature_mem = metrics->AvgTemperature[TEMP_MEM];
gpu_metrics->temperature_vrgfx = metrics->AvgTemperature[TEMP_VR_GFX];
gpu_metrics->temperature_vrsoc = metrics->AvgTemperature[TEMP_VR_SOC];
gpu_metrics->temperature_vrmem = MAX(metrics->AvgTemperature[TEMP_VR_MEM0],
gpu_metrics->temperature_vrmem = max(metrics->AvgTemperature[TEMP_VR_MEM0],
metrics->AvgTemperature[TEMP_VR_MEM1]);
gpu_metrics->average_gfx_activity = metrics->AverageGfxActivity;
gpu_metrics->average_umc_activity = metrics->AverageUclkActivity;
gpu_metrics->average_mm_activity = MAX(metrics->Vcn0ActivityPercentage,
gpu_metrics->average_mm_activity = max(metrics->Vcn0ActivityPercentage,
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
......@@ -2210,7 +2209,7 @@ static int smu_v13_0_7_get_fan_speed_pwm(struct smu_context *smu,
}
/* Convert the PMFW output which is in percent to pwm(255) based */
*speed = MIN(*speed * 255 / 100, 255);
*speed = min(*speed * 255 / 100, (uint32_t)255);
return 0;
}
......
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