Commit bb5a9aba authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bart.bkbits.net/ide-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents c8fab1b6 ab6a3ee7
......@@ -215,8 +215,6 @@ static void icside_build_sglist(ide_drive_t *drive, struct request *rq)
struct scatterlist *sg = hwif->sg_table;
int nents;
BUG_ON(hwif->sg_dma_active);
if (rq->flags & REQ_DRIVE_TASKFILE) {
ide_task_t *args = rq->special;
......@@ -401,8 +399,6 @@ static int icside_dma_end(ide_drive_t *drive)
dma_unmap_sg(state->dev, hwif->sg_table, hwif->sg_nents,
hwif->sg_dma_direction);
hwif->sg_dma_active = 0;
return get_dma_residue(hwif->hw.dma) != 0;
}
......@@ -454,7 +450,6 @@ icside_dma_common(ide_drive_t *drive, struct request *rq,
/*
* We can not enable DMA on both channels.
*/
BUG_ON(hwif->sg_dma_active);
BUG_ON(dma_channel_active(hwif->hw.dma));
icside_build_sglist(drive, rq);
......
......@@ -208,9 +208,6 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
struct scatterlist *sg = hwif->sg_table;
int nents;
if (hwif->sg_dma_active)
BUG();
nents = blk_rq_map_sg(drive->queue, rq, hwif->sg_table);
if (rq_data_dir(rq) == READ)
......@@ -366,7 +363,6 @@ int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
hwif->sg_table,
hwif->sg_nents,
hwif->sg_dma_direction);
hwif->sg_dma_active = 0;
return 0; /* revert to PIO for this request */
}
......@@ -390,7 +386,6 @@ void ide_destroy_dmatable (ide_drive_t *drive)
int nents = HWIF(drive)->sg_nents;
pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
HWIF(drive)->sg_dma_active = 0;
}
EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
......
......@@ -384,6 +384,8 @@ void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err)
args->hobRegister[IDE_DATA_OFFSET] = (data >> 8) & 0xFF;
}
args->tfRegister[IDE_ERROR_OFFSET] = err;
/* be sure we're looking at the low order bits */
hwif->OUTB(drive->ctl & ~0x80, IDE_CONTROL_REG);
args->tfRegister[IDE_NSECTOR_OFFSET] = hwif->INB(IDE_NSECTOR_REG);
args->tfRegister[IDE_SECTOR_OFFSET] = hwif->INB(IDE_SECTOR_REG);
args->tfRegister[IDE_LCYL_OFFSET] = hwif->INB(IDE_LCYL_REG);
......
......@@ -416,6 +416,9 @@ static void __init init_hwif_amd74xx(ide_hwif_t *hwif)
{
int i;
if (!hwif->irq)
hwif->irq = hwif->channel ? 15 : 14;
hwif->autodma = 0;
hwif->tuneproc = &amd74xx_tune_drive;
......
......@@ -44,65 +44,6 @@
#include "hpt34x.h"
#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
#include <linux/proc_fs.h>
static u8 hpt34x_proc = 0;
#define HPT34X_MAX_DEVS 8
static struct pci_dev *hpt34x_devs[HPT34X_MAX_DEVS];
static int n_hpt34x_devs;
static int hpt34x_get_info (char *buffer, char **addr, off_t offset, int count)
{
char *p = buffer;
int i, len;
p += sprintf(p, "\n "
"HPT34X Chipset.\n");
for (i = 0; i < n_hpt34x_devs; i++) {
struct pci_dev *dev = hpt34x_devs[i];
unsigned long bibma = pci_resource_start(dev, 4);
u8 c0 = 0, c1 = 0;
/*
* at that point bibma+0x2 et bibma+0xa are byte registers
* to investigate:
*/
c0 = inb_p((u16)bibma + 0x02);
c1 = inb_p((u16)bibma + 0x0a);
p += sprintf(p, "\nController: %d\n", i);
p += sprintf(p, "--------------- Primary Channel "
"---------------- Secondary Channel "
"-------------\n");
p += sprintf(p, " %sabled "
" %sabled\n",
(c0&0x80) ? "dis" : " en",
(c1&0x80) ? "dis" : " en");
p += sprintf(p, "--------------- drive0 --------- drive1 "
"-------- drive0 ---------- drive1 ------\n");
p += sprintf(p, "DMA enabled: %s %s"
" %s %s\n",
(c0&0x20) ? "yes" : "no ",
(c0&0x40) ? "yes" : "no ",
(c1&0x20) ? "yes" : "no ",
(c1&0x40) ? "yes" : "no " );
p += sprintf(p, "UDMA\n");
p += sprintf(p, "DMA\n");
p += sprintf(p, "PIO\n");
}
p += sprintf(p, "\n");
/* p - buffer must be less than 4k! */
len = (p - buffer) - offset;
*addr = buffer + offset;
return len > count ? count : len;
}
#endif /* defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS) */
static u8 hpt34x_ratemask (ide_drive_t *drive)
{
return 1;
......@@ -277,15 +218,6 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
local_irq_restore(flags);
#if defined(DISPLAY_HPT34X_TIMINGS) && defined(CONFIG_PROC_FS)
hpt34x_devs[n_hpt34x_devs++] = dev;
if (!hpt34x_proc) {
hpt34x_proc = 1;
ide_pci_create_host_proc("hpt34x", hpt34x_get_info);
}
#endif /* DISPLAY_HPT34X_TIMINGS && CONFIG_PROC_FS */
return dev->irq;
}
......
......@@ -11,8 +11,6 @@
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
#endif
#undef DISPLAY_HPT34X_TIMINGS
static unsigned int init_chipset_hpt34x(struct pci_dev *, const char *);
static void init_hwif_hpt34x(ide_hwif_t *);
......
......@@ -570,7 +570,6 @@ sgiioc4_build_dma_table(ide_drive_t * drive, struct request *rq, int ddir)
use_pio_instead:
pci_unmap_sg(hwif->pci_dev, hwif->sg_table, hwif->sg_nents,
hwif->sg_dma_direction);
hwif->sg_dma_active = 0;
return 0; /* revert to PIO for this request */
}
......
......@@ -1578,9 +1578,6 @@ pmac_ide_build_sglist(ide_drive_t *drive, struct request *rq)
struct scatterlist *sg = pmif->sg_table;
int nents;
if (hwif->sg_dma_active)
BUG();
nents = blk_rq_map_sg(drive->queue, rq, sg);
if (rq_data_dir(rq) == READ)
......@@ -1715,7 +1712,6 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
pmif->sg_table,
pmif->sg_nents,
pmif->sg_dma_direction);
hwif->sg_dma_active = 0;
return 0; /* revert to PIO for this request */
}
......@@ -1731,7 +1727,6 @@ pmac_ide_destroy_dmatable (ide_drive_t *drive)
if (nents) {
pci_unmap_sg(dev, sg, nents, pmif->sg_dma_direction);
pmif->sg_nents = 0;
HWIF(drive)->sg_dma_active = 0;
}
}
......
......@@ -929,7 +929,6 @@ typedef struct hwif_s {
struct scatterlist *sg_table;
int sg_nents; /* Current number of entries in it */
int sg_dma_direction; /* dma transfer direction */
int sg_dma_active; /* is it in use */
/* data phase of the active command (currently only valid for PIO/DMA) */
int data_phase;
......
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