Commit bbc5dc51 authored by Loys Ollivier's avatar Loys Ollivier Committed by Paul Walmsley

riscv: defconfig: enable SOC_SIFIVE

Enable SOC_SIFIVE so the default upstream config is bootable on the SiFive
Unleashed Board.
And have basic support for future boards based on the same SoC.
Signed-off-by: default avatarLoys Ollivier <lollivier@baylibre.com>
Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: updated to apply]
Signed-off-by: default avatarPaul Walmsley <paul.walmsley@sifive.com>
parent edb7f21c
...@@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y ...@@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y CONFIG_EXPERT=y
CONFIG_BPF_SYSCALL=y CONFIG_BPF_SYSCALL=y
CONFIG_SOC_SIFIVE=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_MODULES=y CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_UNLOAD=y
...@@ -51,8 +52,6 @@ CONFIG_SERIAL_8250=y ...@@ -51,8 +52,6 @@ CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_SERIAL_SIFIVE=y
CONFIG_SERIAL_SIFIVE_CONSOLE=y
CONFIG_HVC_RISCV_SBI=y CONFIG_HVC_RISCV_SBI=y
# CONFIG_PTP_1588_CLOCK is not set # CONFIG_PTP_1588_CLOCK is not set
CONFIG_DRM=y CONFIG_DRM=y
...@@ -68,9 +67,6 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y ...@@ -68,9 +67,6 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y CONFIG_USB_UAS=y
CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO=y
CONFIG_CLK_SIFIVE=y
CONFIG_CLK_SIFIVE_FU540_PRCI=y
CONFIG_SIFIVE_PLIC=y
CONFIG_SPI_SIFIVE=y CONFIG_SPI_SIFIVE=y
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_POSIX_ACL=y
......
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