Skip to content

L
linux
Commit bcc8cef7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files
Options

Merge tag 'samsung-dt-3' of... 

Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Pull "Samsung 3rd DT updates for v3.19" from Kukjin Kim:

- exynos3250
  : remove unused bootargs on exynos3250-rinato
  : add new board dt file for exynos3250-monk
- exynos4
  : add missing clock for MFC
  : specify default clocks for camera
- exynos4x12
  : add TMU related DT nodes
- exynos4412-trats2
  : add max77693-haptic and pwm nodes, enable TMU support
- exynos4412-odroid
  : specify audio clock parents and rates
- exynos5250 and exynos5420
  : add syscon based phandle to i2c device nodes
- exynos5250-spring
  : add trackpad, temperature sensor and usb3505 pinctrl

Note: based on previous tags/samsung-dt-2 for v3.19

* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: add sysreg phandle to i2c device nodes for exynos
  ARM: dts: Remove unused bootargs from exynos3250-rinato
  ARM: dts: add board dts file for Exynos3250-based Monk board
  Documentation: devicetree: Add Exynos-based boards compatible string
  ARM: dts: add missing clock to MFC device for exynos4
  ARM: dts: Specify audio clock parents and rates for exynos4412-odroid-common
  ARM: dts: Add trackpad to exynos5250-spring
  ARM: dts: Add temperature sensor to exynos5250-spring
  ARM: dts: Add usb3503 pinctrl to exynos5250-spring
  ARM: dts: Add max77693-haptic node for exynos4412-trats2
  ARM: dts: add pwm node for exynos4412-trats2
  ARM: dts: Specify default clocks for Exynos4 camera devices
  ARM: dts: Enable TMU support for exynos4412-trats2
  ARM: dts: Device tree node definition for TMU on exynos4x12
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 16a8cb59 1888eb75
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 751 additions and 15 deletions
Documentation/devicetree/bindings/arm/samsung-boards.txt
View file @ bcc8cef7
* Samsung's Exynos4210 based SMDKV310 evaluation board
SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
* Samsung's Exynos SoC based boards
Required root node properties:
- compatible = should be one or more of the following.
(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
- "samsung,monk" - for Exynos3250-based Samsung Simband board.
- "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
- "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
- "samsung,trats" - for Exynos4210-based Tizen Reference board.
- "samsung,universal_c210" - for Exynos4210-based Samsung board.
- "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
- "samsung,trats2" - for Exynos4412-based Tizen Reference board.
- "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
- "samsung,xyref5260" - for Exynos5260-based Samsung board.
- "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
Optional:
- firmware node, specifying presence and type of secure firmware:
......
Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
View file @ bcc8cef7
......@@ -32,6 +32,7 @@ Optional properties:
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 100000.
- samsung,sysreg-phandle - handle to syscon used to control the system registers
Example:
......
arch/arm/boot/dts/Makefile
View file @ bcc8cef7
......@@ -71,7 +71,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-rinato.dtb \
dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
exynos3250-rinato.dtb \
exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
......
arch/arm/boot/dts/exynos3250-monk.dts 0 → 100644
View file @ bcc8cef7
This diff is collapsed.
arch/arm/boot/dts/exynos3250-rinato.dts
View file @ bcc8cef7
......@@ -28,10 +28,6 @@ memory {
reg = <0x40000000 0x1ff00000>;
};
chosen {
bootargs = "console=ttySAC1,115200N8 root=/dev/mmcblk0p15 rootwait earlyprintk panic=5";
};
firmware@0205F000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
......
arch/arm/boot/dts/exynos4.dtsi
View file @ bcc8cef7
......@@ -392,8 +392,8 @@ mfc: codec@13400000 {
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
clocks = <&clock CLK_MFC>;
clock-names = "mfc";
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
status = "disabled";
};
......
arch/arm/boot/dts/exynos4210-trats.dts
View file @ bcc8cef7
......@@ -431,18 +431,34 @@ camera {
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
};
arch/arm/boot/dts/exynos4210-universal_c210.dts
View file @ bcc8cef7
......@@ -473,18 +473,34 @@ camera {
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
};
......
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file @ bcc8cef7
......@@ -45,6 +45,16 @@ sound: sound {
compatible = "samsung,odroidx2-audio";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&max98090>;
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<192000000>,
<19200000>;
};
mmc@12550000 {
......@@ -82,18 +92,34 @@ camera {
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
};
......
arch/arm/boot/dts/exynos4412-trats2.dts
View file @ bcc8cef7
......@@ -543,6 +543,12 @@ charger_reg: CHARGER@0 {
regulator-max-microamp = <2580000>;
};
};
max77693_haptic {
compatible = "maxim,max77693-haptic";
haptic-supply = <&ldo26_reg>;
pwms = <&pwm 0 38022 0>;
};
};
};
......@@ -589,6 +595,11 @@ serial@13830000 {
status = "okay";
};
tmu@100C0000 {
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
i2c_ak8975: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpy2 4 0>, <&gpy2 5 0>;
......@@ -636,6 +647,13 @@ controller-data {
};
};
pwm: pwm@139D0000 {
pinctrl-0 = <&pwm0_out>;
pinctrl-names = "default";
samsung,pwm-outputs = <0>;
status = "okay";
};
dsi_0: dsi@11C80000 {
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
......@@ -701,28 +719,51 @@ camera: camera {
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>,
<&clock CLK_MOUT_CAM1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_MOUT_MPLL_USER_T>;
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
csis_0: csis@11880000 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
clock-frequency = <176000000>;
assigned-clocks = <&clock CLK_MOUT_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera C (3) MIPI CSI-2 (CSIS0) */
port@3 {
......@@ -736,10 +777,13 @@ csis0_ep: endpoint {
};
csis_1: csis@11890000 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
clock-frequency = <160000000>;
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CSIS1>,
<&clock CLK_SCLK_CSIS1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera D (4) MIPI CSI-2 (CSIS1) */
port@4 {
......
arch/arm/boot/dts/exynos4x12.dtsi
View file @ bcc8cef7
......@@ -271,4 +271,14 @@ exynos-usbphy@125B0000 {
compatible = "samsung,exynos4x12-usb2-phy";
samsung,sysreg-phandle = <&sys_reg>;
};
tmu@100C0000 {
compatible = "samsung,exynos4412-tmu";
interrupt-parent = <&combiner>;
interrupts = <2 4>;
reg = <0x100C0000 0x100>;
clocks = <&clock 383>;
clock-names = "tmu_apbif";
status = "disabled";
};
};
arch/arm/boot/dts/exynos5250-spring.dts
View file @ bcc8cef7
......@@ -52,6 +52,8 @@ lid-switch {
usb-hub {
compatible = "smsc,usb3503a";
reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hsic_reset>;
};
fixed-rate-clocks {
......@@ -328,6 +330,22 @@ &i2c_1 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
trackpad@4b {
compatible = "atmel,maxtouch";
reg = <0x4b>;
interrupt-parent = <&gpx1>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&trackpad_irq>;
linux,gpio-keymap = <KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
BTN_LEFT>;
wakeup-source;
};
};
/*
......@@ -381,6 +399,11 @@ &i2c_7 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
temperature-sensor@4c {
compatible = "gmt,g781";
reg = <0x4c>;
};
};
&i2c_8 {
......@@ -458,6 +481,13 @@ dp_hpd_gpio: dp-hpd-gpio {
samsung,pin-drv = <0>;
};
trackpad_irq: trackpad-irq {
samsung,pins = "gpx1-2";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
power_key_irq: power-key-irq {
samsung,pins = "gpx1-3";
samsung,pin-function = <0>;
......
arch/arm/boot/dts/exynos5250.dtsi
View file @ bcc8cef7
......@@ -293,6 +293,7 @@ i2c_0: i2c@12C60000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -306,6 +307,7 @@ i2c_1: i2c@12C70000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -319,6 +321,7 @@ i2c_2: i2c@12C80000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -332,6 +335,7 @@ i2c_3: i2c@12C90000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......
arch/arm/boot/dts/exynos5420.dtsi
View file @ bcc8cef7
......@@ -560,6 +560,7 @@ i2c_0: i2c@12C60000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -573,6 +574,7 @@ i2c_1: i2c@12C70000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -586,6 +588,7 @@ i2c_2: i2c@12C80000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -599,6 +602,7 @@ i2c_3: i2c@12C90000 {
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7