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Commit be1c3c1e authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Ralf Baechle
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[MIPS] Pb1100 code style cleanup 

Fix several errors and warnings given by checkpatch.pl:

- space between asterisk and variable name;

- use of C99 // comments;

- using simple_strtol() where strict_strtol() could be used.

In addition to these changes, also do the following:

- properly indent the code;

- remove space after the type cast's closing parenthesis;

- replace numeric literals/expressions with the matching macros;

- replace spaces after the macro name with tabs in the #define directives,
  and sometimes insert spaces there;

- fix typos/errors, capitalize acronyms, etc. in the comments;

- make the multi-line comment style consistent with the kernel style
  elsewhere by adding empty first line;

- update MontaVista copyright;

- remove Pete Popov's old email address...
Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7916c354
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Showing with 87 additions and 86 deletions
arch/mips/au1000/pb1100/Makefile
View file @ be1c3c1e
# #
# Copyright 2000,2001 MontaVista Software Inc. # Copyright 2000, 2001, 2008 MontaVista Software Inc.
# Author: MontaVista Software, Inc. # Author: MontaVista Software, Inc. <source@mvista.com>
# ppopov@mvista.com or source@mvista.com
# #
# Makefile for the Alchemy Semiconductor Pb1100 board. # Makefile for the Alchemy Semiconductor Pb1100 board.
#
lib-y := init.o board_setup.o irqmap.o lib-y := init.o board_setup.o irqmap.o
arch/mips/au1000/pb1100/board_setup.c
View file @ be1c3c1e
/* /*
* Copyright 2002 MontaVista Software Inc. * Copyright 2002, 2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. * Author: MontaVista Software, Inc. <source@mvista.com>
* ppopov@mvista.com or source@mvista.com
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -32,15 +31,15 @@ ...@@ -32,15 +31,15 @@
void board_reset(void) void board_reset(void)
{ {
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ /* Hit BCSR.RST_VDDI[SOFT_RESET] */
au_writel(0x00000000, 0xAE00001C); au_writel(0x00000000, PB1100_RST_VDDI);
} }
void __init board_setup(void) void __init board_setup(void)
{ {
volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
// set AUX clock to 12MHz * 8 = 96 MHz /* Set AUX clock to 12 MHz * 8 = 96 MHz */
au_writel(8, SYS_AUXPLL); au_writel(8, SYS_AUXPLL);
au_writel(0, SYS_PININPUTEN); au_writel(0, SYS_PININPUTEN);
udelay(100); udelay(100);
...@@ -49,44 +48,47 @@ void __init board_setup(void) ...@@ -49,44 +48,47 @@ void __init board_setup(void)
{ {
u32 pin_func, sys_freqctrl, sys_clksrc; u32 pin_func, sys_freqctrl, sys_clksrc;
// configure pins GPIO[14:9] as GPIO /* Configure pins GPIO[14:9] as GPIO */
pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
/* zero and disable FREQ2 */ /* Zero and disable FREQ2 */
sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000; sys_freqctrl &= ~0xFFF00000;
au_writel(sys_freqctrl, SYS_FREQCTRL0); au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD/IrDA clock */ /* Zero and disable USBH/USBD/IrDA clock */
sys_clksrc = au_readl(SYS_CLKSRC); sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x0000001F; sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
au_writel(sys_clksrc, SYS_CLKSRC); au_writel(sys_clksrc, SYS_CLKSRC);
sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000; sys_freqctrl &= ~0xFFF00000;
sys_clksrc = au_readl(SYS_CLKSRC); sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x0000001F; sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
// FREQ2 = aux/2 = 48 MHz /* FREQ2 = aux / 2 = 48 MHz */
sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
SYS_FC_FE2 | SYS_FC_FS2;
au_writel(sys_freqctrl, SYS_FREQCTRL0); au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* /*
* Route 48MHz FREQ2 into USBH/USBD/IrDA * Route 48 MHz FREQ2 into USBH/USBD/IrDA
*/ */
sys_clksrc |= ((4<<2) | (0<<1) | 0 ); sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
au_writel(sys_clksrc, SYS_CLKSRC); au_writel(sys_clksrc, SYS_CLKSRC);
/* setup the static bus controller */ /* Setup the static bus controller */
au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
// get USB Functionality pin state (device vs host drive pins) /*
pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); * Get USB Functionality pin state (device vs host drive pins).
// 2nd USB port is USB host */
pin_func |= 0x8000; pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
/* 2nd USB port is USB host. */
pin_func |= SYS_PF_USB;
au_writel(pin_func, SYS_PINFUNC); au_writel(pin_func, SYS_PINFUNC);
} }
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
...@@ -94,12 +96,12 @@ void __init board_setup(void) ...@@ -94,12 +96,12 @@ void __init board_setup(void)
/* Enable sys bus clock divider when IDLE state or no bus activity. */ /* Enable sys bus clock divider when IDLE state or no bus activity. */
au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
// Enable the RTC if not already enabled /* Enable the RTC if not already enabled. */
if (!(readb(base + 0x28) & 0x20)) { if (!(readb(base + 0x28) & 0x20)) {
writeb(readb(base + 0x28) | 0x20, base + 0x28); writeb(readb(base + 0x28) | 0x20, base + 0x28);
au_sync(); au_sync();
} }
// Put the clock in BCD mode /* Put the clock in BCD mode. */
if (readb(base + 0x2C) & 0x4) { /* reg B */ if (readb(base + 0x2C) & 0x4) { /* reg B */
writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
au_sync(); au_sync();
......
arch/mips/au1000/pb1100/init.c
View file @ be1c3c1e
...@@ -3,9 +3,8 @@ ...@@ -3,9 +3,8 @@
* BRIEF MODULE DESCRIPTION * BRIEF MODULE DESCRIPTION
* Pb1100 board setup * Pb1100 board setup
* *
* Copyright 2002 MontaVista Software Inc. * Copyright 2002, 2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. * Author: MontaVista Software, Inc. <source@mvista.com>
* ppopov@mvista.com or source@mvista.com
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -46,8 +45,8 @@ void __init prom_init(void) ...@@ -46,8 +45,8 @@ void __init prom_init(void)
unsigned long memsize; unsigned long memsize;
prom_argc = fw_arg0; prom_argc = fw_arg0;
prom_argv = (char **) fw_arg1; prom_argv = (char **)fw_arg1;
prom_envp = (char **) fw_arg3; prom_envp = (char **)fw_arg3;
prom_init_cmdline(); prom_init_cmdline();
...@@ -55,7 +54,7 @@ void __init prom_init(void) ...@@ -55,7 +54,7 @@ void __init prom_init(void)
if (!memsize_str) if (!memsize_str)
memsize = 0x04000000; memsize = 0x04000000;
else else
memsize = simple_strtol(memsize_str, NULL, 0); memsize = strict_strtol(memsize_str, 0, NULL);
add_memory_region(0, memsize, BOOT_MEM_RAM); add_memory_region(0, memsize, BOOT_MEM_RAM);
} }
arch/mips/au1000/pb1100/irqmap.c
View file @ be1c3c1e
/* /*
* BRIEF MODULE DESCRIPTION * BRIEF MODULE DESCRIPTION
* Au1xxx irq map table * Au1xx0 IRQ map table
* *
* Copyright 2003 Embedded Edge, LLC * Copyright 2003 Embedded Edge, LLC
* dan@embeddededge.com * dan@embeddededge.com
...@@ -31,10 +31,10 @@ ...@@ -31,10 +31,10 @@
#include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1000.h>
struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
{ AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted# { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card Fully_Inserted# */
{ AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG# { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card STSCHG# */
{ AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ# { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card IRQ# */
{ AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ# { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, /* DC_IRQ# */
}; };
int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
include/asm-mips/mach-pb1x00/pb1100.h
View file @ be1c3c1e
/* /*
* Alchemy Semi PB1100 Referrence Board * Alchemy Semi Pb1100 Referrence Board
* *
* Copyright 2001 MontaVista Software Inc. * Copyright 2001, 2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. * Author: MontaVista Software, Inc. <source@mvista.com>
* ppopov@mvista.com or source@mvista.com
* *
* ######################################################################## * ########################################################################
* *
...@@ -27,59 +26,60 @@ ...@@ -27,59 +26,60 @@
#ifndef __ASM_PB1100_H #ifndef __ASM_PB1100_H
#define __ASM_PB1100_H #define __ASM_PB1100_H
#define PB1100_IDENT 0xAE000000 #define PB1100_IDENT 0xAE000000
#define BOARD_STATUS_REG 0xAE000004 #define BOARD_STATUS_REG 0xAE000004
# define PB1100_ROM_SEL (1<<15) # define PB1100_ROM_SEL (1 << 15)
# define PB1100_ROM_SIZ (1<<14) # define PB1100_ROM_SIZ (1 << 14)
# define PB1100_SWAP_BOOT (1<<13) # define PB1100_SWAP_BOOT (1 << 13)
# define PB1100_FLASH_WP (1<<12) # define PB1100_FLASH_WP (1 << 12)
# define PB1100_ROM_H_STS (1<<11) # define PB1100_ROM_H_STS (1 << 11)
# define PB1100_ROM_L_STS (1<<10) # define PB1100_ROM_L_STS (1 << 10)
# define PB1100_FLASH_H_STS (1<<9) # define PB1100_FLASH_H_STS (1 << 9)
# define PB1100_FLASH_L_STS (1<<8) # define PB1100_FLASH_L_STS (1 << 8)
# define PB1100_SRAM_SIZ (1<<7) # define PB1100_SRAM_SIZ (1 << 7)
# define PB1100_TSC_BUSY (1<<6) # define PB1100_TSC_BUSY (1 << 6)
# define PB1100_PCMCIA_VS_MASK (3<<4) # define PB1100_PCMCIA_VS_MASK (3 << 4)
# define PB1100_RS232_CD (1<<3) # define PB1100_RS232_CD (1 << 3)
# define PB1100_RS232_CTS (1<<2) # define PB1100_RS232_CTS (1 << 2)
# define PB1100_RS232_DSR (1<<1) # define PB1100_RS232_DSR (1 << 1)
# define PB1100_RS232_RI (1<<0) # define PB1100_RS232_RI (1 << 0)
#define PB1100_IRDA_RS232 0xAE00000C #define PB1100_IRDA_RS232 0xAE00000C
# define PB1100_IRDA_FULL (0<<14) /* full power */ # define PB1100_IRDA_FULL (0 << 14) /* full power */
# define PB1100_IRDA_SHUTDOWN (1<<14) # define PB1100_IRDA_SHUTDOWN (1 << 14)
# define PB1100_IRDA_TT (2<<14) /* 2/3 power */ # define PB1100_IRDA_TT (2 << 14) /* 2/3 power */
# define PB1100_IRDA_OT (3<<14) /* 1/3 power */ # define PB1100_IRDA_OT (3 << 14) /* 1/3 power */
# define PB1100_IRDA_FIR (1<<13) # define PB1100_IRDA_FIR (1 << 13)
#define PCMCIA_BOARD_REG 0xAE000010 #define PCMCIA_BOARD_REG 0xAE000010
# define PB1100_SD_WP1_RO (1<<15) /* read only */ # define PB1100_SD_WP1_RO (1 << 15) /* read only */
# define PB1100_SD_WP0_RO (1<<14) /* read only */ # define PB1100_SD_WP0_RO (1 << 14) /* read only */
# define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */ # define PB1100_SD_PWR1 (1 << 11) /* applies power to SD1 */
# define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */ # define PB1100_SD_PWR0 (1 << 10) /* applies power to SD0 */
# define PB1100_SEL_SD_CONN1 (1<<9) # define PB1100_SEL_SD_CONN1 (1 << 9)
# define PB1100_SEL_SD_CONN0 (1<<8) # define PB1100_SEL_SD_CONN0 (1 << 8)
# define PC_DEASSERT_RST (1<<7) # define PC_DEASSERT_RST (1 << 7)
# define PC_DRV_EN (1<<4) # define PC_DRV_EN (1 << 4)
#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ #define PB1100_G_CONTROL 0xAE000014 /* graphics control */
#define PB1100_RST_VDDI 0xAE00001C #define PB1100_RST_VDDI 0xAE00001C
# define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */ # define PB1100_SOFT_RESET (1 << 15) /* clear to reset the board */
# define PB1100_VDDI_MASK (0x1F) # define PB1100_VDDI_MASK 0x1F
#define PB1100_LEDS 0xAE000018 #define PB1100_LEDS 0xAE000018
/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED. /*
* 7:0 is the LED Display's decimal points. * 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
* 7:0 is the LED Display's decimal points.
*/ */
#define PB1100_HEX_LED 0xAE000018 #define PB1100_HEX_LED 0xAE000018
/* PCMCIA PB1100 specific defines */ /* PCMCIA Pb1100 specific defines */
#define PCMCIA_MAX_SOCK 0 #define PCMCIA_MAX_SOCK 0
#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
/* VPP/VCC */ /* VPP/VCC */
#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) #define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0))
#endif /* __ASM_PB1100_H */ #endif /* __ASM_PB1100_H */
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