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Kirill Smelkov
linux
Commits
be6bb8cc
Commit
be6bb8cc
authored
Sep 16, 2011
by
Kukjin Kim
Browse files
Options
Browse Files
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Plain Diff
Merge branch 'next/topic-cpuid-rev' into next/topic-add-exynos4212
parents
d03c3593
b02b5da4
Changes
13
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Showing
13 changed files
with
220 additions
and
60 deletions
+220
-60
arch/arm/mach-exynos4/cpu.c
arch/arm/mach-exynos4/cpu.c
+23
-5
arch/arm/mach-exynos4/include/mach/map.h
arch/arm/mach-exynos4/include/mach/map.h
+2
-1
arch/arm/mach-exynos4/platsmp.c
arch/arm/mach-exynos4/platsmp.c
+6
-2
arch/arm/mach-s3c64xx/cpu.c
arch/arm/mach-s3c64xx/cpu.c
+7
-15
arch/arm/mach-s5p64x0/dev-spi.c
arch/arm/mach-s5p64x0/dev-spi.c
+3
-5
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/dma.c
+2
-5
arch/arm/mach-s5p64x0/gpiolib.c
arch/arm/mach-s5p64x0/gpiolib.c
+2
-5
arch/arm/mach-s5p64x0/irq-eint.c
arch/arm/mach-s5p64x0/irq-eint.c
+2
-1
arch/arm/plat-s3c24xx/cpu.c
arch/arm/plat-s3c24xx/cpu.c
+4
-5
arch/arm/plat-s5p/cpu.c
arch/arm/plat-s5p/cpu.c
+14
-14
arch/arm/plat-samsung/Makefile
arch/arm/plat-samsung/Makefile
+1
-1
arch/arm/plat-samsung/cpu.c
arch/arm/plat-samsung/cpu.c
+58
-0
arch/arm/plat-samsung/include/plat/cpu.h
arch/arm/plat-samsung/include/plat/cpu.h
+96
-1
No files found.
arch/arm/mach-exynos4/cpu.c
View file @
be6bb8cc
...
@@ -43,11 +43,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
...
@@ -43,11 +43,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_SYSTIMER
),
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_SYSTIMER
),
.
length
=
SZ_4K
,
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
(
unsigned
long
)
S5P_VA_SYSRAM
,
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_SYSRAM
),
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
,
},
{
},
{
.
virtual
=
(
unsigned
long
)
S5P_VA_CMU
,
.
virtual
=
(
unsigned
long
)
S5P_VA_CMU
,
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_CMU
),
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_CMU
),
...
@@ -121,6 +116,24 @@ static struct map_desc exynos4_iodesc[] __initdata = {
...
@@ -121,6 +116,24 @@ static struct map_desc exynos4_iodesc[] __initdata = {
},
},
};
};
static
struct
map_desc
exynos4_iodesc0
[]
__initdata
=
{
{
.
virtual
=
(
unsigned
long
)
S5P_VA_SYSRAM
,
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_SYSRAM0
),
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
,
},
};
static
struct
map_desc
exynos4_iodesc1
[]
__initdata
=
{
{
.
virtual
=
(
unsigned
long
)
S5P_VA_SYSRAM
,
.
pfn
=
__phys_to_pfn
(
EXYNOS4_PA_SYSRAM1
),
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
,
},
};
static
void
exynos4_idle
(
void
)
static
void
exynos4_idle
(
void
)
{
{
if
(
!
need_resched
())
if
(
!
need_resched
())
...
@@ -143,6 +156,11 @@ void __init exynos4_map_io(void)
...
@@ -143,6 +156,11 @@ void __init exynos4_map_io(void)
{
{
iotable_init
(
exynos4_iodesc
,
ARRAY_SIZE
(
exynos4_iodesc
));
iotable_init
(
exynos4_iodesc
,
ARRAY_SIZE
(
exynos4_iodesc
));
if
(
soc_is_exynos4210
()
&&
samsung_rev
()
==
EXYNOS4210_REV_0
)
iotable_init
(
exynos4_iodesc0
,
ARRAY_SIZE
(
exynos4_iodesc0
));
else
iotable_init
(
exynos4_iodesc1
,
ARRAY_SIZE
(
exynos4_iodesc1
));
/* initialize device information early */
/* initialize device information early */
exynos4_default_sdhci0
();
exynos4_default_sdhci0
();
exynos4_default_sdhci1
();
exynos4_default_sdhci1
();
...
...
arch/arm/mach-exynos4/include/mach/map.h
View file @
be6bb8cc
...
@@ -23,7 +23,8 @@
...
@@ -23,7 +23,8 @@
#include <plat/map-s5p.h>
#include <plat/map-s5p.h>
#define EXYNOS4_PA_SYSRAM 0x02020000
#define EXYNOS4_PA_SYSRAM0 0x02025000
#define EXYNOS4_PA_SYSRAM1 0x02020000
#define EXYNOS4_PA_FIMC0 0x11800000
#define EXYNOS4_PA_FIMC0 0x11800000
#define EXYNOS4_PA_FIMC1 0x11810000
#define EXYNOS4_PA_FIMC1 0x11810000
...
...
arch/arm/mach-exynos4/platsmp.c
View file @
be6bb8cc
...
@@ -30,9 +30,12 @@
...
@@ -30,9 +30,12 @@
#include <mach/regs-clock.h>
#include <mach/regs-clock.h>
#include <mach/regs-pmu.h>
#include <mach/regs-pmu.h>
#include <plat/cpu.h>
extern
void
exynos4_secondary_startup
(
void
);
extern
void
exynos4_secondary_startup
(
void
);
#define CPU1_BOOT_REG S5P_VA_SYSRAM
#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM5 : S5P_VA_SYSRAM)
/*
/*
* control for which core is the next to come out of the secondary
* control for which core is the next to come out of the secondary
...
@@ -218,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
...
@@ -218,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
* secondary CPU branches to this address.
*/
*/
__raw_writel
(
BSYM
(
virt_to_phys
(
exynos4_secondary_startup
)),
S5P_VA_SYSRAM
);
__raw_writel
(
BSYM
(
virt_to_phys
(
exynos4_secondary_startup
)),
CPU1_BOOT_REG
);
}
}
arch/arm/mach-s3c64xx/cpu.c
View file @
be6bb8cc
...
@@ -43,16 +43,16 @@ static const char name_s3c6410[] = "S3C6410";
...
@@ -43,16 +43,16 @@ static const char name_s3c6410[] = "S3C6410";
static
struct
cpu_table
cpu_ids
[]
__initdata
=
{
static
struct
cpu_table
cpu_ids
[]
__initdata
=
{
{
{
.
idcode
=
0x36400000
,
.
idcode
=
S3C6400_CPU_ID
,
.
idmask
=
0xfffff000
,
.
idmask
=
S3C64XX_CPU_MASK
,
.
map_io
=
s3c6400_map_io
,
.
map_io
=
s3c6400_map_io
,
.
init_clocks
=
s3c6400_init_clocks
,
.
init_clocks
=
s3c6400_init_clocks
,
.
init_uarts
=
s3c6400_init_uarts
,
.
init_uarts
=
s3c6400_init_uarts
,
.
init
=
s3c6400_init
,
.
init
=
s3c6400_init
,
.
name
=
name_s3c6400
,
.
name
=
name_s3c6400
,
},
{
},
{
.
idcode
=
0x36410100
,
.
idcode
=
S3C6410_CPU_ID
,
.
idmask
=
0xffffff00
,
.
idmask
=
S3C64XX_CPU_MASK
,
.
map_io
=
s3c6410_map_io
,
.
map_io
=
s3c6410_map_io
,
.
init_clocks
=
s3c6410_init_clocks
,
.
init_clocks
=
s3c6410_init_clocks
,
.
init_uarts
=
s3c6410_init_uarts
,
.
init_uarts
=
s3c6410_init_uarts
,
...
@@ -140,22 +140,14 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
...
@@ -140,22 +140,14 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
void
__init
s3c64xx_init_io
(
struct
map_desc
*
mach_desc
,
int
size
)
void
__init
s3c64xx_init_io
(
struct
map_desc
*
mach_desc
,
int
size
)
{
{
unsigned
long
idcode
;
/* initialise the io descriptors we need for initialisation */
/* initialise the io descriptors we need for initialisation */
iotable_init
(
s3c_iodesc
,
ARRAY_SIZE
(
s3c_iodesc
));
iotable_init
(
s3c_iodesc
,
ARRAY_SIZE
(
s3c_iodesc
));
iotable_init
(
mach_desc
,
size
);
iotable_init
(
mach_desc
,
size
);
idcode
=
__raw_readl
(
S3C_VA_SYS
+
0x118
);
/* detect cpu id */
if
(
!
idcode
)
{
s3c64xx_init_cpu
();
/* S3C6400 has the ID register in a different place,
* and needs a write before it can be read. */
__raw_writel
(
0x0
,
S3C_VA_SYS
+
0xA1C
);
idcode
=
__raw_readl
(
S3C_VA_SYS
+
0xA1C
);
}
s3c_init_cpu
(
idcode
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
s3c_init_cpu
(
samsung_cpu_id
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
}
}
static
__init
int
s3c64xx_sysdev_init
(
void
)
static
__init
int
s3c64xx_sysdev_init
(
void
)
...
...
arch/arm/mach-s5p64x0/dev-spi.c
View file @
be6bb8cc
...
@@ -21,6 +21,7 @@
...
@@ -21,6 +21,7 @@
#include <mach/regs-clock.h>
#include <mach/regs-clock.h>
#include <mach/spi-clocks.h>
#include <mach/spi-clocks.h>
#include <plat/cpu.h>
#include <plat/s3c64xx-spi.h>
#include <plat/s3c64xx-spi.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg.h>
...
@@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = {
...
@@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = {
void
__init
s5p64x0_spi_set_info
(
int
cntrlr
,
int
src_clk_nr
,
int
num_cs
)
void
__init
s5p64x0_spi_set_info
(
int
cntrlr
,
int
src_clk_nr
,
int
num_cs
)
{
{
unsigned
int
id
;
struct
s3c64xx_spi_info
*
pd
;
struct
s3c64xx_spi_info
*
pd
;
id
=
__raw_readl
(
S5P64X0_SYS_ID
)
&
0xFF000
;
/* Reject invalid configuration */
/* Reject invalid configuration */
if
(
!
num_cs
||
src_clk_nr
<
0
if
(
!
num_cs
||
src_clk_nr
<
0
||
src_clk_nr
>
S5P64X0_SPI_SRCCLK_SCLK
)
{
||
src_clk_nr
>
S5P64X0_SPI_SRCCLK_SCLK
)
{
...
@@ -199,7 +197,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
...
@@ -199,7 +197,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
switch
(
cntrlr
)
{
switch
(
cntrlr
)
{
case
0
:
case
0
:
if
(
id
==
0x50000
)
if
(
soc_is_s5p6450
()
)
pd
=
&
s5p6450_spi0_pdata
;
pd
=
&
s5p6450_spi0_pdata
;
else
else
pd
=
&
s5p6440_spi0_pdata
;
pd
=
&
s5p6440_spi0_pdata
;
...
@@ -207,7 +205,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
...
@@ -207,7 +205,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
s5p64x0_device_spi0
.
dev
.
platform_data
=
pd
;
s5p64x0_device_spi0
.
dev
.
platform_data
=
pd
;
break
;
break
;
case
1
:
case
1
:
if
(
id
==
0x50000
)
if
(
soc_is_s5p6450
()
)
pd
=
&
s5p6450_spi1_pdata
;
pd
=
&
s5p6450_spi1_pdata
;
else
else
pd
=
&
s5p6440_spi1_pdata
;
pd
=
&
s5p6440_spi1_pdata
;
...
...
arch/arm/mach-s5p64x0/dma.c
View file @
be6bb8cc
...
@@ -28,6 +28,7 @@
...
@@ -28,6 +28,7 @@
#include <mach/irqs.h>
#include <mach/irqs.h>
#include <mach/regs-clock.h>
#include <mach/regs-clock.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/devs.h>
#include <plat/s3c-pl330-pdata.h>
#include <plat/s3c-pl330-pdata.h>
...
@@ -133,11 +134,7 @@ static struct platform_device s5p64x0_device_pdma = {
...
@@ -133,11 +134,7 @@ static struct platform_device s5p64x0_device_pdma = {
static
int
__init
s5p64x0_dma_init
(
void
)
static
int
__init
s5p64x0_dma_init
(
void
)
{
{
unsigned
int
id
;
if
(
soc_is_s5p6450
())
id
=
__raw_readl
(
S5P64X0_SYS_ID
)
&
0xFF000
;
if
(
id
==
0x50000
)
s5p64x0_device_pdma
.
dev
.
platform_data
=
&
s5p6450_pdma_pdata
;
s5p64x0_device_pdma
.
dev
.
platform_data
=
&
s5p6450_pdma_pdata
;
else
else
s5p64x0_device_pdma
.
dev
.
platform_data
=
&
s5p6440_pdma_pdata
;
s5p64x0_device_pdma
.
dev
.
platform_data
=
&
s5p6440_pdma_pdata
;
...
...
arch/arm/mach-s5p64x0/gpiolib.c
View file @
be6bb8cc
...
@@ -19,6 +19,7 @@
...
@@ -19,6 +19,7 @@
#include <mach/regs-gpio.h>
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>
#include <mach/regs-clock.h>
#include <plat/cpu.h>
#include <plat/gpio-core.h>
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
#include <plat/gpio-cfg-helpers.h>
...
@@ -473,14 +474,10 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
...
@@ -473,14 +474,10 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
static
int
__init
s5p64x0_gpiolib_init
(
void
)
static
int
__init
s5p64x0_gpiolib_init
(
void
)
{
{
unsigned
int
chipid
;
chipid
=
__raw_readl
(
S5P64X0_SYS_ID
);
s5p64x0_gpiolib_set_cfg
(
s5p64x0_gpio_cfgs
,
s5p64x0_gpiolib_set_cfg
(
s5p64x0_gpio_cfgs
,
ARRAY_SIZE
(
s5p64x0_gpio_cfgs
));
ARRAY_SIZE
(
s5p64x0_gpio_cfgs
));
if
(
(
chipid
&
0xff000
)
==
0x50000
)
{
if
(
soc_is_s5p6450
()
)
{
samsung_gpiolib_add_2bit_chips
(
s5p6450_gpio_2bit
,
samsung_gpiolib_add_2bit_chips
(
s5p6450_gpio_2bit
,
ARRAY_SIZE
(
s5p6450_gpio_2bit
));
ARRAY_SIZE
(
s5p6450_gpio_2bit
));
...
...
arch/arm/mach-s5p64x0/irq-eint.c
View file @
be6bb8cc
...
@@ -17,6 +17,7 @@
...
@@ -17,6 +17,7 @@
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/regs-irqtype.h>
#include <plat/regs-irqtype.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg.h>
...
@@ -67,7 +68,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
...
@@ -67,7 +68,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
__raw_writel
(
ctrl
,
S5P64X0_EINT0CON0
);
__raw_writel
(
ctrl
,
S5P64X0_EINT0CON0
);
/* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
/* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
if
(
0x50000
==
(
__raw_readl
(
S5P64X0_SYS_ID
)
&
0xFF000
))
if
(
soc_is_s5p6450
(
))
s3c_gpio_cfgpin
(
S5P6450_GPN
(
offs
),
S3C_GPIO_SFN
(
2
));
s3c_gpio_cfgpin
(
S5P6450_GPN
(
offs
),
S3C_GPIO_SFN
(
2
));
else
else
s3c_gpio_cfgpin
(
S5P6440_GPN
(
offs
),
S3C_GPIO_SFN
(
2
));
s3c_gpio_cfgpin
(
S5P6440_GPN
(
offs
),
S3C_GPIO_SFN
(
2
));
...
...
arch/arm/plat-s3c24xx/cpu.c
View file @
be6bb8cc
...
@@ -215,19 +215,18 @@ static void s3c24xx_pm_restart(char mode, const char *cmd)
...
@@ -215,19 +215,18 @@ static void s3c24xx_pm_restart(char mode, const char *cmd)
void
__init
s3c24xx_init_io
(
struct
map_desc
*
mach_desc
,
int
size
)
void
__init
s3c24xx_init_io
(
struct
map_desc
*
mach_desc
,
int
size
)
{
{
unsigned
long
idcode
=
0x0
;
/* initialise the io descriptors we need for initialisation */
/* initialise the io descriptors we need for initialisation */
iotable_init
(
mach_desc
,
size
);
iotable_init
(
mach_desc
,
size
);
iotable_init
(
s3c_iodesc
,
ARRAY_SIZE
(
s3c_iodesc
));
iotable_init
(
s3c_iodesc
,
ARRAY_SIZE
(
s3c_iodesc
));
if
(
cpu_architecture
()
>=
CPU_ARCH_ARMv5
)
{
if
(
cpu_architecture
()
>=
CPU_ARCH_ARMv5
)
{
idcode
=
s3c24xx_read_idcode_v5
();
samsung_cpu_id
=
s3c24xx_read_idcode_v5
();
}
else
{
}
else
{
idcode
=
s3c24xx_read_idcode_v4
();
samsung_cpu_id
=
s3c24xx_read_idcode_v4
();
}
}
s3c24xx_init_cpu
();
arm_pm_restart
=
s3c24xx_pm_restart
;
arm_pm_restart
=
s3c24xx_pm_restart
;
s3c_init_cpu
(
idcode
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
s3c_init_cpu
(
samsung_cpu_id
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
}
}
arch/arm/plat-s5p/cpu.c
View file @
be6bb8cc
...
@@ -36,40 +36,40 @@ static const char name_exynos4210[] = "EXYNOS4210";
...
@@ -36,40 +36,40 @@ static const char name_exynos4210[] = "EXYNOS4210";
static
struct
cpu_table
cpu_ids
[]
__initdata
=
{
static
struct
cpu_table
cpu_ids
[]
__initdata
=
{
{
{
.
idcode
=
0x56440100
,
.
idcode
=
S5P6440_CPU_ID
,
.
idmask
=
0xfffff000
,
.
idmask
=
S5P64XX_CPU_MASK
,
.
map_io
=
s5p6440_map_io
,
.
map_io
=
s5p6440_map_io
,
.
init_clocks
=
s5p6440_init_clocks
,
.
init_clocks
=
s5p6440_init_clocks
,
.
init_uarts
=
s5p6440_init_uarts
,
.
init_uarts
=
s5p6440_init_uarts
,
.
init
=
s5p64x0_init
,
.
init
=
s5p64x0_init
,
.
name
=
name_s5p6440
,
.
name
=
name_s5p6440
,
},
{
},
{
.
idcode
=
0x36450000
,
.
idcode
=
S5P6450_CPU_ID
,
.
idmask
=
0xfffff000
,
.
idmask
=
S5P64XX_CPU_MASK
,
.
map_io
=
s5p6450_map_io
,
.
map_io
=
s5p6450_map_io
,
.
init_clocks
=
s5p6450_init_clocks
,
.
init_clocks
=
s5p6450_init_clocks
,
.
init_uarts
=
s5p6450_init_uarts
,
.
init_uarts
=
s5p6450_init_uarts
,
.
init
=
s5p64x0_init
,
.
init
=
s5p64x0_init
,
.
name
=
name_s5p6450
,
.
name
=
name_s5p6450
,
},
{
},
{
.
idcode
=
0x43100000
,
.
idcode
=
S5PC100_CPU_ID
,
.
idmask
=
0xfffff000
,
.
idmask
=
S5PC100_CPU_MASK
,
.
map_io
=
s5pc100_map_io
,
.
map_io
=
s5pc100_map_io
,
.
init_clocks
=
s5pc100_init_clocks
,
.
init_clocks
=
s5pc100_init_clocks
,
.
init_uarts
=
s5pc100_init_uarts
,
.
init_uarts
=
s5pc100_init_uarts
,
.
init
=
s5pc100_init
,
.
init
=
s5pc100_init
,
.
name
=
name_s5pc100
,
.
name
=
name_s5pc100
,
},
{
},
{
.
idcode
=
0x43110000
,
.
idcode
=
S5PV210_CPU_ID
,
.
idmask
=
0xfffff000
,
.
idmask
=
S5PV210_CPU_MASK
,
.
map_io
=
s5pv210_map_io
,
.
map_io
=
s5pv210_map_io
,
.
init_clocks
=
s5pv210_init_clocks
,
.
init_clocks
=
s5pv210_init_clocks
,
.
init_uarts
=
s5pv210_init_uarts
,
.
init_uarts
=
s5pv210_init_uarts
,
.
init
=
s5pv210_init
,
.
init
=
s5pv210_init
,
.
name
=
name_s5pv210
,
.
name
=
name_s5pv210
,
},
{
},
{
.
idcode
=
0x43210000
,
.
idcode
=
EXYNOS4210_CPU_ID
,
.
idmask
=
0xfffe0000
,
.
idmask
=
EXYNOS4_CPU_MASK
,
.
map_io
=
exynos4_map_io
,
.
map_io
=
exynos4_map_io
,
.
init_clocks
=
exynos4_init_clocks
,
.
init_clocks
=
exynos4_init_clocks
,
.
init_uarts
=
exynos4_init_uarts
,
.
init_uarts
=
exynos4_init_uarts
,
...
@@ -114,13 +114,13 @@ static struct map_desc s5p_iodesc[] __initdata = {
...
@@ -114,13 +114,13 @@ static struct map_desc s5p_iodesc[] __initdata = {
void
__init
s5p_init_io
(
struct
map_desc
*
mach_desc
,
void
__init
s5p_init_io
(
struct
map_desc
*
mach_desc
,
int
size
,
void
__iomem
*
cpuid_addr
)
int
size
,
void
__iomem
*
cpuid_addr
)
{
{
unsigned
long
idcode
;
/* initialize the io descriptors we need for initialization */
/* initialize the io descriptors we need for initialization */
iotable_init
(
s5p_iodesc
,
ARRAY_SIZE
(
s5p_iodesc
));
iotable_init
(
s5p_iodesc
,
ARRAY_SIZE
(
s5p_iodesc
));
if
(
mach_desc
)
if
(
mach_desc
)
iotable_init
(
mach_desc
,
size
);
iotable_init
(
mach_desc
,
size
);
idcode
=
__raw_readl
(
cpuid_addr
);
/* detect cpu id and rev. */
s3c_init_cpu
(
idcode
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
s5p_init_cpu
(
cpuid_addr
);
s3c_init_cpu
(
samsung_cpu_id
,
cpu_ids
,
ARRAY_SIZE
(
cpu_ids
));
}
}
arch/arm/plat-samsung/Makefile
View file @
be6bb8cc
...
@@ -11,7 +11,7 @@ obj- :=
...
@@ -11,7 +11,7 @@ obj- :=
# Objects we always build independent of SoC choice
# Objects we always build independent of SoC choice
obj-y
+=
init.o
obj-y
+=
init.o
cpu.o
obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)
+=
time.o
obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)
+=
time.o
obj-y
+=
clock.o
obj-y
+=
clock.o
obj-y
+=
pwm-clock.o
obj-y
+=
pwm-clock.o
...
...
arch/arm/plat-samsung/cpu.c
0 → 100644
View file @
be6bb8cc
/* linux/arch/arm/plat-samsung/cpu.c
*
* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Samsung CPU Support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/system.h>
#include <mach/map.h>
#include <plat/cpu.h>
unsigned
long
samsung_cpu_id
;
static
unsigned
int
samsung_cpu_rev
;
unsigned
int
samsung_rev
(
void
)
{
return
samsung_cpu_rev
;
}
EXPORT_SYMBOL
(
samsung_rev
);
void
__init
s3c24xx_init_cpu
(
void
)
{
/* nothing here yet */
samsung_cpu_rev
=
0
;
}
void
__init
s3c64xx_init_cpu
(
void
)
{
samsung_cpu_id
=
__raw_readl
(
S3C_VA_SYS
+
0x118
);
if
(
!
samsung_cpu_id
)
{
/*
* S3C6400 has the ID register in a different place,
* and needs a write before it can be read.
*/
__raw_writel
(
0x0
,
S3C_VA_SYS
+
0xA1C
);
samsung_cpu_id
=
__raw_readl
(
S3C_VA_SYS
+
0xA1C
);
}
samsung_cpu_rev
=
0
;
}
void
__init
s5p_init_cpu
(
void
__iomem
*
cpuid_addr
)
{
samsung_cpu_id
=
__raw_readl
(
cpuid_addr
);
samsung_cpu_rev
=
samsung_cpu_id
&
0xFF
;
}
arch/arm/plat-samsung/include/plat/cpu.h
View file @
be6bb8cc
/* linux/arch/arm/plat-samsung/include/plat/cpu.h
/* linux/arch/arm/plat-samsung/include/plat/cpu.h
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
*
* Copyright (c) 2004-2005 Simtec Electronics
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* Ben Dooks <ben@simtec.co.uk>
*
*
* Header file for S
3C24XX
CPU support
* Header file for S
amsung
CPU support
*
*
* This program is free software; you can redistribute it and/or modify
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* it under the terms of the GNU General Public License version 2 as
...
@@ -15,6 +18,92 @@
...
@@ -15,6 +18,92 @@
#ifndef __SAMSUNG_PLAT_CPU_H
#ifndef __SAMSUNG_PLAT_CPU_H
#define __SAMSUNG_PLAT_CPU_H
#define __SAMSUNG_PLAT_CPU_H
extern
unsigned
long
samsung_cpu_id
;
#define S3C24XX_CPU_ID 0x32400000
#define S3C24XX_CPU_MASK 0xFFF00000
#define S3C6400_CPU_ID 0x36400000
#define S3C6410_CPU_ID 0x36410000
#define S3C64XX_CPU_ID (S3C6400_CPU_ID & S3C6410_CPU_ID)
#define S3C64XX_CPU_MASK 0xFFFFF000
#define S5P6440_CPU_ID 0x56440000
#define S5P6450_CPU_ID 0x36450000
#define S5P64XX_CPU_MASK 0xFFFFF000
#define S5PC100_CPU_ID 0x43100000
#define S5PC100_CPU_MASK 0xFFFFF000
#define S5PV210_CPU_ID 0x43110000
#define S5PV210_CPU_MASK 0xFFFFF000
#define EXYNOS4210_CPU_ID 0x43210000
#define EXYNOS4_CPU_MASK 0xFFFE0000
#define IS_SAMSUNG_CPU(name, id, mask) \
static inline int is_samsung_##name(void) \
{ \
return ((samsung_cpu_id & mask) == (id & mask)); \
}
IS_SAMSUNG_CPU
(
s3c24xx
,
S3C24XX_CPU_ID
,
S3C24XX_CPU_MASK
)
IS_SAMSUNG_CPU
(
s3c64xx
,
S3C64XX_CPU_ID
,
S3C64XX_CPU_MASK
)
IS_SAMSUNG_CPU
(
s5p6440
,
S5P6440_CPU_ID
,
S5P64XX_CPU_MASK
)
IS_SAMSUNG_CPU
(
s5p6450
,
S5P6450_CPU_ID
,
S5P64XX_CPU_MASK
)
IS_SAMSUNG_CPU
(
s5pc100
,
S5PC100_CPU_ID
,
S5PC100_CPU_MASK
)
IS_SAMSUNG_CPU
(
s5pv210
,
S5PV210_CPU_ID
,
S5PV210_CPU_MASK
)
IS_SAMSUNG_CPU
(
exynos4210
,
EXYNOS4210_CPU_ID
,
EXYNOS4_CPU_MASK
)
#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
defined(CONFIG_CPU_S3C2442) || defined(CONFIG_CPU_S3C244X) || \
defined(CONFIG_CPU_S3C2443)
# define soc_is_s3c24xx() is_samsung_s3c24xx()
#else
# define soc_is_s3c24xx() 0
#endif
#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
# define soc_is_s3c64xx() is_samsung_s3c64xx()
#else
# define soc_is_s3c64xx() 0
#endif
#if defined(CONFIG_CPU_S5P6440)
# define soc_is_s5p6440() is_samsung_s5p6440()
#else
# define soc_is_s5p6440() 0
#endif
#if defined(CONFIG_CPU_S5P6450)
# define soc_is_s5p6450() is_samsung_s5p6450()
#else
# define soc_is_s5p6450() 0
#endif
#if defined(CONFIG_CPU_S5PC100)
# define soc_is_s5pc100() is_samsung_s5pc100()
#else
# define soc_is_s5pc100() 0
#endif
#if defined(CONFIG_CPU_S5PV210)
# define soc_is_s5pv210() is_samsung_s5pv210()
#else
# define soc_is_s5pv210() 0
#endif
#if defined(CONFIG_CPU_EXYNOS4210)
# define soc_is_exynos4210() is_samsung_exynos4210()
#else
# define soc_is_exynos4210() 0
#endif
#define EXYNOS4210_REV_0 (0x0)
#define EXYNOS4210_REV_1_0 (0x10)
#define EXYNOS4210_REV_1_1 (0x11)
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#ifndef MHZ
...
@@ -55,6 +144,12 @@ extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
...
@@ -55,6 +144,12 @@ extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
extern
void
s5p_init_io
(
struct
map_desc
*
mach_desc
,
extern
void
s5p_init_io
(
struct
map_desc
*
mach_desc
,
int
size
,
void
__iomem
*
cpuid_addr
);
int
size
,
void
__iomem
*
cpuid_addr
);
extern
void
s3c24xx_init_cpu
(
void
);
extern
void
s3c64xx_init_cpu
(
void
);
extern
void
s5p_init_cpu
(
void
__iomem
*
cpuid_addr
);
extern
unsigned
int
samsung_rev
(
void
);
extern
void
s3c24xx_init_uarts
(
struct
s3c2410_uartcfg
*
cfg
,
int
no
);
extern
void
s3c24xx_init_uarts
(
struct
s3c2410_uartcfg
*
cfg
,
int
no
);
extern
void
s3c24xx_init_clocks
(
int
xtal
);
extern
void
s3c24xx_init_clocks
(
int
xtal
);
...
...
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