Commit beb7dd86 authored by Robert P. J. Day's avatar Robert P. J. Day Committed by Adrian Bunk

Fix misspellings collected by members of KJ list.

Fix the misspellings of "propogate", "writting" and (oh, the shame
:-) "kenrel" in the source tree.
Signed-off-by: default avatarRobert P. J. Day <rpjday@mindspring.com>
Signed-off-by: default avatarAdrian Bunk <bunk@stusta.de>
parent 3dde6ad8
...@@ -228,7 +228,7 @@ Controls the kernel's behaviour when an oops or BUG is encountered. ...@@ -228,7 +228,7 @@ Controls the kernel's behaviour when an oops or BUG is encountered.
pid_max: pid_max:
PID allocation wrap value. When the kenrel's next PID value PID allocation wrap value. When the kernel's next PID value
reaches this value, it wraps back to a minimum PID value. reaches this value, it wraps back to a minimum PID value.
PIDs of value pid_max or larger are not allocated. PIDs of value pid_max or larger are not allocated.
......
...@@ -747,7 +747,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) ...@@ -747,7 +747,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
* counter value etc.) are not copied to the actual registers * counter value etc.) are not copied to the actual registers
* until the performance monitor is enabled. In order to get * until the performance monitor is enabled. In order to get
* this to work as desired, the permormance monitor needs to * this to work as desired, the permormance monitor needs to
* be disabled while writting to the latches. This is a * be disabled while writing to the latches. This is a
* HW design issue. * HW design issue.
*/ */
cbe_enable_pm(cpu); cbe_enable_pm(cpu);
......
...@@ -1413,7 +1413,7 @@ static void ack_apic_level(unsigned int irq) ...@@ -1413,7 +1413,7 @@ static void ack_apic_level(unsigned int irq)
/* /*
* We must acknowledge the irq before we move it or the acknowledge will * We must acknowledge the irq before we move it or the acknowledge will
* not propogate properly. * not propagate properly.
*/ */
ack_APIC_irq(); ack_APIC_irq();
......
...@@ -1573,11 +1573,11 @@ void no_tty(void) ...@@ -1573,11 +1573,11 @@ void no_tty(void)
/** /**
* stop_tty - propogate flow control * stop_tty - propagate flow control
* @tty: tty to stop * @tty: tty to stop
* *
* Perform flow control to the driver. For PTY/TTY pairs we * Perform flow control to the driver. For PTY/TTY pairs we
* must also propogate the TIOCKPKT status. May be called * must also propagate the TIOCKPKT status. May be called
* on an already stopped device and will not re-call the driver * on an already stopped device and will not re-call the driver
* method. * method.
* *
...@@ -1607,11 +1607,11 @@ void stop_tty(struct tty_struct *tty) ...@@ -1607,11 +1607,11 @@ void stop_tty(struct tty_struct *tty)
EXPORT_SYMBOL(stop_tty); EXPORT_SYMBOL(stop_tty);
/** /**
* start_tty - propogate flow control * start_tty - propagate flow control
* @tty: tty to start * @tty: tty to start
* *
* Start a tty that has been stopped if at all possible. Perform * Start a tty that has been stopped if at all possible. Perform
* any neccessary wakeups and propogate the TIOCPKT status. If this * any neccessary wakeups and propagate the TIOCPKT status. If this
* is the tty was previous stopped and is being started then the * is the tty was previous stopped and is being started then the
* driver start method is invoked and the line discipline woken. * driver start method is invoked and the line discipline woken.
* *
......
...@@ -266,7 +266,7 @@ static int dib7000m_sad_calib(struct dib7000m_state *state) ...@@ -266,7 +266,7 @@ static int dib7000m_sad_calib(struct dib7000m_state *state)
{ {
/* internal */ /* internal */
// dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth // dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is written in set_bandwidth
dib7000m_write_word(state, 929, (0 << 1) | (0 << 0)); dib7000m_write_word(state, 929, (0 << 1) | (0 << 0));
dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096 dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096
......
...@@ -223,7 +223,7 @@ static int dib7000p_set_bandwidth(struct dvb_frontend *demod, u8 BW_Idx) ...@@ -223,7 +223,7 @@ static int dib7000p_set_bandwidth(struct dvb_frontend *demod, u8 BW_Idx)
static int dib7000p_sad_calib(struct dib7000p_state *state) static int dib7000p_sad_calib(struct dib7000p_state *state)
{ {
/* internal */ /* internal */
// dib7000p_write_word(state, 72, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth // dib7000p_write_word(state, 72, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is written in set_bandwidth
dib7000p_write_word(state, 73, (0 << 1) | (0 << 0)); dib7000p_write_word(state, 73, (0 << 1) | (0 << 0));
dib7000p_write_word(state, 74, 776); // 0.625*3.3 / 4096 dib7000p_write_word(state, 74, 776); // 0.625*3.3 / 4096
......
...@@ -70,7 +70,7 @@ static int em2800_i2c_send_max4(struct em28xx *dev, unsigned char addr, ...@@ -70,7 +70,7 @@ static int em2800_i2c_send_max4(struct em28xx *dev, unsigned char addr,
ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len); ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len);
if (ret != 2 + len) { if (ret != 2 + len) {
em28xx_warn("writting to i2c device failed (error=%i)\n", ret); em28xx_warn("writing to i2c device failed (error=%i)\n", ret);
return -EIO; return -EIO;
} }
for (write_timeout = EM2800_I2C_WRITE_TIMEOUT; write_timeout > 0; for (write_timeout = EM2800_I2C_WRITE_TIMEOUT; write_timeout > 0;
......
...@@ -113,7 +113,7 @@ ...@@ -113,7 +113,7 @@
/* RxOver overflow in Recv FIFO */ /* RxOver overflow in Recv FIFO */
/* SipRcv received serial gap (or other condition you set) */ /* SipRcv received serial gap (or other condition you set) */
/* Interrupts are enabled by writing a one to the IER register */ /* Interrupts are enabled by writing a one to the IER register */
/* Interrupts are cleared by writting a one to the ISR register */ /* Interrupts are cleared by writing a one to the ISR register */
/* */ /* */
/* 6. The remaining registers: 0x6 and 0x3 appear to be */ /* 6. The remaining registers: 0x6 and 0x3 appear to be */
/* reserved parts of 16 or 32 bit registersthe remainder */ /* reserved parts of 16 or 32 bit registersthe remainder */
......
...@@ -115,7 +115,7 @@ isl_upload_firmware(islpci_private *priv) ...@@ -115,7 +115,7 @@ isl_upload_firmware(islpci_private *priv)
ISL38XX_MEMORY_WINDOW_SIZE : fw_len; ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN; u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
/* set the cards base address for writting the data */ /* set the card's base address for writing the data */
isl38xx_w32_flush(device_base, reg, isl38xx_w32_flush(device_base, reg,
ISL38XX_DIR_MEM_BASE_REG); ISL38XX_DIR_MEM_BASE_REG);
wmb(); /* be paranoid */ wmb(); /* be paranoid */
......
...@@ -176,7 +176,7 @@ psa_write(struct net_device * dev, ...@@ -176,7 +176,7 @@ psa_write(struct net_device * dev,
volatile u_char __iomem *verify = lp->mem + PSA_ADDR + volatile u_char __iomem *verify = lp->mem + PSA_ADDR +
(psaoff(0, psa_comp_number) << 1); (psaoff(0, psa_comp_number) << 1);
/* Authorize writting to PSA */ /* Authorize writing to PSA */
hacr_write(base, HACR_PWR_STAT | HACR_ROM_WEN); hacr_write(base, HACR_PWR_STAT | HACR_ROM_WEN);
while(n-- > 0) while(n-- > 0)
...@@ -1676,7 +1676,7 @@ wv_set_frequency(u_long base, /* i/o port of the card */ ...@@ -1676,7 +1676,7 @@ wv_set_frequency(u_long base, /* i/o port of the card */
fee_write(base, 0x60, fee_write(base, 0x60,
dac, 2); dac, 2);
/* We now should verify here that the EEprom writting was ok */ /* We now should verify here that the EEprom writing was ok */
/* ReRead the first area */ /* ReRead the first area */
fee_read(base, 0x00, fee_read(base, 0x00,
......
...@@ -120,7 +120,7 @@ ...@@ -120,7 +120,7 @@
* the Wavelan itself (NCR -> AT&T -> Lucent). * the Wavelan itself (NCR -> AT&T -> Lucent).
* *
* All started with Anders Klemets <klemets@paul.rutgers.edu>, * All started with Anders Klemets <klemets@paul.rutgers.edu>,
* writting a Wavelan ISA driver for the MACH microkernel. Girish * writing a Wavelan ISA driver for the MACH microkernel. Girish
* Welling <welling@paul.rutgers.edu> had also worked on it. * Welling <welling@paul.rutgers.edu> had also worked on it.
* Keith Moore modify this for the Pcmcia hardware. * Keith Moore modify this for the Pcmcia hardware.
* *
......
...@@ -156,7 +156,7 @@ static unsigned short get_pins(unsigned minor) ...@@ -156,7 +156,7 @@ static unsigned short get_pins(unsigned minor)
#define BPP_ICR 0x18 #define BPP_ICR 0x18
#define BPP_SIZE 0x1A #define BPP_SIZE 0x1A
/* BPP_CSR. Bits of type RW1 are cleared with writting '1'. */ /* BPP_CSR. Bits of type RW1 are cleared with writing '1'. */
#define P_DEV_ID_MASK 0xf0000000 /* R */ #define P_DEV_ID_MASK 0xf0000000 /* R */
#define P_DEV_ID_ZEBRA 0x40000000 #define P_DEV_ID_ZEBRA 0x40000000
#define P_DEV_ID_L64854 0xa0000000 /* == NCR 89C100+89C105. Pity. */ #define P_DEV_ID_L64854 0xa0000000 /* == NCR 89C100+89C105. Pity. */
......
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
* The device works as an standard CDC device, it has 2 interfaces, the first * The device works as an standard CDC device, it has 2 interfaces, the first
* one is for firmware access and the second is the serial one. * one is for firmware access and the second is the serial one.
* The protocol is very simply, there are two posibilities reading or writing. * The protocol is very simply, there are two posibilities reading or writing.
* When writting the first urb must have a Header that starts with 0x20 0x29 the * When writing the first urb must have a Header that starts with 0x20 0x29 the
* next two bytes must say how much data will be sended. * next two bytes must say how much data will be sended.
* When reading the process is almost equal except that the header starts with * When reading the process is almost equal except that the header starts with
* 0x00 0x20. * 0x00 0x20.
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
* buffer: The First and Second byte is used for a Header, the Third and Fourth * buffer: The First and Second byte is used for a Header, the Third and Fourth
* tells the device the amount of information the package holds. * tells the device the amount of information the package holds.
* Packages are 60 bytes long Header Stuff. * Packages are 60 bytes long Header Stuff.
* When writting to the device the first two bytes of the header are 0x20 0x29 * When writing to the device the first two bytes of the header are 0x20 0x29
* When reading the bytes are 0x00 0x20, or 0x00 0x10, there is an strange * When reading the bytes are 0x00 0x20, or 0x00 0x10, there is an strange
* situation, when too much data arrives to the device because it sends the data * situation, when too much data arrives to the device because it sends the data
* but with out the header. I will use a simply hack to override this situation, * but with out the header. I will use a simply hack to override this situation,
......
...@@ -2465,7 +2465,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r ...@@ -2465,7 +2465,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r
((edge_serial->is_epic) && ((edge_serial->is_epic) &&
(!edge_serial->epic_descriptor.Supports.IOSPWriteMCR) && (!edge_serial->epic_descriptor.Supports.IOSPWriteMCR) &&
(regNum == MCR))) { (regNum == MCR))) {
dbg("SendCmdWriteUartReg - Not writting to MCR Register"); dbg("SendCmdWriteUartReg - Not writing to MCR Register");
return 0; return 0;
} }
...@@ -2473,7 +2473,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r ...@@ -2473,7 +2473,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r
((edge_serial->is_epic) && ((edge_serial->is_epic) &&
(!edge_serial->epic_descriptor.Supports.IOSPWriteLCR) && (!edge_serial->epic_descriptor.Supports.IOSPWriteLCR) &&
(regNum == LCR))) { (regNum == LCR))) {
dbg ("SendCmdWriteUartReg - Not writting to LCR Register"); dbg ("SendCmdWriteUartReg - Not writing to LCR Register");
return 0; return 0;
} }
......
...@@ -72,7 +72,7 @@ ...@@ -72,7 +72,7 @@
* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
* *
* (following author is not in any relation with this code, but his ideas * (following author is not in any relation with this code, but his ideas
* were used when writting this driver) * were used when writing this driver)
* *
* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
* *
......
...@@ -70,7 +70,7 @@ ...@@ -70,7 +70,7 @@
* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
* *
* (following author is not in any relation with this code, but his ideas * (following author is not in any relation with this code, but his ideas
* were used when writting this driver) * were used when writing this driver)
* *
* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
* *
......
...@@ -93,7 +93,7 @@ ...@@ -93,7 +93,7 @@
* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
* *
* (following author is not in any relation with this code, but his ideas * (following author is not in any relation with this code, but his ideas
* were used when writting this driver) * were used when writing this driver)
* *
* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
* *
......
...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
* *
* (following author is not in any relation with this code, but his ideas * (following author is not in any relation with this code, but his ideas
* were used when writting this driver) * were used when writing this driver)
* *
* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
* *
......
...@@ -439,7 +439,7 @@ static int dio_bio_complete(struct dio *dio, struct bio *bio) ...@@ -439,7 +439,7 @@ static int dio_bio_complete(struct dio *dio, struct bio *bio)
* Wait on and process all in-flight BIOs. This must only be called once * Wait on and process all in-flight BIOs. This must only be called once
* all bios have been issued so that the refcount can only decrease. * all bios have been issued so that the refcount can only decrease.
* This just waits for all bios to make it through dio_bio_complete. IO * This just waits for all bios to make it through dio_bio_complete. IO
* errors are propogated through dio->io_error and should be propogated via * errors are propagated through dio->io_error and should be propagated via
* dio_complete(). * dio_complete().
*/ */
static void dio_await_completion(struct dio *dio) static void dio_await_completion(struct dio *dio)
......
...@@ -1110,7 +1110,7 @@ static int flush_commit_list(struct super_block *s, ...@@ -1110,7 +1110,7 @@ static int flush_commit_list(struct super_block *s,
if (!barrier) { if (!barrier) {
/* If there was a write error in the journal - we can't commit /* If there was a write error in the journal - we can't commit
* this transaction - it will be invalid and, if successful, * this transaction - it will be invalid and, if successful,
* will just end up propogating the write error out to * will just end up propagating the write error out to
* the file system. */ * the file system. */
if (likely(!retval && !reiserfs_is_journal_aborted (journal))) { if (likely(!retval && !reiserfs_is_journal_aborted (journal))) {
if (buffer_dirty(jl->j_commit_bh)) if (buffer_dirty(jl->j_commit_bh))
...@@ -1125,7 +1125,7 @@ static int flush_commit_list(struct super_block *s, ...@@ -1125,7 +1125,7 @@ static int flush_commit_list(struct super_block *s,
/* If there was a write error in the journal - we can't commit this /* If there was a write error in the journal - we can't commit this
* transaction - it will be invalid and, if successful, will just end * transaction - it will be invalid and, if successful, will just end
* up propogating the write error out to the filesystem. */ * up propagating the write error out to the filesystem. */
if (unlikely(!buffer_uptodate(jl->j_commit_bh))) { if (unlikely(!buffer_uptodate(jl->j_commit_bh))) {
#ifdef CONFIG_REISERFS_CHECK #ifdef CONFIG_REISERFS_CHECK
reiserfs_warning(s, "journal-615: buffer write failed"); reiserfs_warning(s, "journal-615: buffer write failed");
......
...@@ -58,7 +58,7 @@ extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; ...@@ -58,7 +58,7 @@ extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
* if you do not require the atomic guarantees. * if you do not require the atomic guarantees.
* *
* Note: there are no guarantees that this function will not be reordered * Note: there are no guarantees that this function will not be reordered
* on non x86 architectures, so if you are writting portable code, * on non x86 architectures, so if you are writing portable code,
* make sure not to rely on its reordering guarantees. * make sure not to rely on its reordering guarantees.
* *
* Note that @nr may be almost arbitrarily large; this function is not * Note that @nr may be almost arbitrarily large; this function is not
......
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
* if you do not require the atomic guarantees. * if you do not require the atomic guarantees.
* *
* Note: there are no guarantees that this function will not be reordered * Note: there are no guarantees that this function will not be reordered
* on non x86 architectures, so if you are writting portable code, * on non x86 architectures, so if you are writing portable code,
* make sure not to rely on its reordering guarantees. * make sure not to rely on its reordering guarantees.
* *
* Note that @nr may be almost arbitrarily large; this function is not * Note that @nr may be almost arbitrarily large; this function is not
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
#define EXTENDED_VGA 0xfffe /* 80x50 mode */ #define EXTENDED_VGA 0xfffe /* 80x50 mode */
#define ASK_VGA 0xfffd /* ask for it at bootup */ #define ASK_VGA 0xfffd /* ask for it at bootup */
/* Physical address where kenrel should be loaded. */ /* Physical address where kernel should be loaded. */
#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
+ (CONFIG_PHYSICAL_ALIGN - 1)) \ + (CONFIG_PHYSICAL_ALIGN - 1)) \
& ~(CONFIG_PHYSICAL_ALIGN - 1)) & ~(CONFIG_PHYSICAL_ALIGN - 1))
......
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
* if you do not require the atomic guarantees. * if you do not require the atomic guarantees.
* *
* Note: there are no guarantees that this function will not be reordered * Note: there are no guarantees that this function will not be reordered
* on non x86 architectures, so if you are writting portable code, * on non-x86 architectures, so if you are writing portable code,
* make sure not to rely on its reordering guarantees. * make sure not to rely on its reordering guarantees.
* *
* Note that @nr may be almost arbitrarily large; this function is not * Note that @nr may be almost arbitrarily large; this function is not
......
...@@ -136,7 +136,7 @@ extern void __xchg_called_with_bad_pointer(void); ...@@ -136,7 +136,7 @@ extern void __xchg_called_with_bad_pointer(void);
"add3 "reg0", "addr", #0x2000; \n\t" \ "add3 "reg0", "addr", #0x2000; \n\t" \
"ld "reg0", @"reg0"; \n\t" \ "ld "reg0", @"reg0"; \n\t" \
"unlock "reg0", @"reg1"; \n\t" "unlock "reg0", @"reg1"; \n\t"
/* FIXME: This workaround code cannot handle kenrel modules /* FIXME: This workaround code cannot handle kernel modules
* correctly under SMP environment. * correctly under SMP environment.
*/ */
#else /* CONFIG_CHIP_M32700_TS1 */ #else /* CONFIG_CHIP_M32700_TS1 */
......
...@@ -254,7 +254,7 @@ extern void free_init_pages(const char *what, ...@@ -254,7 +254,7 @@ extern void free_init_pages(const char *what,
extern char arcs_cmdline[CL_SIZE]; extern char arcs_cmdline[CL_SIZE];
/* /*
* Registers a0, a1, a3 and a4 as passed to the kenrel entry by firmware * Registers a0, a1, a3 and a4 as passed to the kernel entry by firmware
*/ */
extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
......
...@@ -33,7 +33,7 @@ struct mnt_namespace; ...@@ -33,7 +33,7 @@ struct mnt_namespace;
#define MNT_SHARED 0x1000 /* if the vfsmount is a shared mount */ #define MNT_SHARED 0x1000 /* if the vfsmount is a shared mount */
#define MNT_UNBINDABLE 0x2000 /* if the vfsmount is a unbindable mount */ #define MNT_UNBINDABLE 0x2000 /* if the vfsmount is a unbindable mount */
#define MNT_PNODE_MASK 0x3000 /* propogation flag mask */ #define MNT_PNODE_MASK 0x3000 /* propagation flag mask */
struct vfsmount { struct vfsmount {
struct list_head mnt_hash; struct list_head mnt_hash;
......
...@@ -63,7 +63,7 @@ extern const struct snd_ice1712_card_info snd_ice1712_delta_cards[]; ...@@ -63,7 +63,7 @@ extern const struct snd_ice1712_card_info snd_ice1712_delta_cards[];
/* look to CS8414 datasheet */ /* look to CS8414 datasheet */
#define ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK 0x04 #define ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK 0x04
/* S/PDIF output status clock */ /* S/PDIF output status clock */
/* (writting on rising edge - 0->1) */ /* (writing on rising edge - 0->1) */
/* all except Delta44 */ /* all except Delta44 */
/* look to CS8404A datasheet */ /* look to CS8404A datasheet */
#define ICE1712_DELTA_SPDIF_OUT_STAT_DATA 0x08 #define ICE1712_DELTA_SPDIF_OUT_STAT_DATA 0x08
...@@ -100,7 +100,7 @@ extern const struct snd_ice1712_card_info snd_ice1712_delta_cards[]; ...@@ -100,7 +100,7 @@ extern const struct snd_ice1712_card_info snd_ice1712_delta_cards[];
/* AKM4524 serial data */ /* AKM4524 serial data */
#define ICE1712_DELTA_CODEC_SERIAL_CLOCK 0x20 #define ICE1712_DELTA_CODEC_SERIAL_CLOCK 0x20
/* AKM4524 serial clock */ /* AKM4524 serial clock */
/* (writting on rising edge - 0->1 */ /* (writing on rising edge - 0->1 */
#define ICE1712_DELTA_CODEC_CHIP_A 0x40 #define ICE1712_DELTA_CODEC_CHIP_A 0x40
#define ICE1712_DELTA_CODEC_CHIP_B 0x80 #define ICE1712_DELTA_CODEC_CHIP_B 0x80
/* 1 - select chip A or B */ /* 1 - select chip A or B */
......
...@@ -673,7 +673,7 @@ static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len) ...@@ -673,7 +673,7 @@ static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len)
} }
/* /*
* Send prepared cmd string. It works by writting a JUMP cmd into * Send prepared cmd string. It works by writing a JUMP cmd into
* the last WAIT cmd and force DBRI to reread the cmd. * the last WAIT cmd and force DBRI to reread the cmd.
* The JUMP cmd points to the new cmd string. * The JUMP cmd points to the new cmd string.
* It also releases the cmdlock spinlock. * It also releases the cmdlock spinlock.
......
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