Commit bee5af7e authored by Anjali Singhai Jain's avatar Anjali Singhai Jain Committed by Jeff Kirsher

i40e/i40evf: Add EEE LPI stats

Add 4 new stats to keep track of EEE LPI (Low Power Idle) state.

Change-ID: Id6316619bb0559789770288b694a54d17f8fac5c
Signed-off-by: default avatarAnjali Singhai Jain <anjali.singhai@intel.com>
Acked-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: default avatarKevin Scott <kevin.c.scott@intel.com>
Signed-off-by: default avatarCatherine Sullivan <catherine.sullivan@intel.com>
Tested-by: default avatarKavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent a85ae0e9
...@@ -114,6 +114,11 @@ static struct i40e_stats i40e_gstrings_stats[] = { ...@@ -114,6 +114,11 @@ static struct i40e_stats i40e_gstrings_stats[] = {
I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
I40E_PF_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), I40E_PF_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
/* LPI stats */
I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
}; };
#define I40E_QUEUE_STATS_LEN(n) \ #define I40E_QUEUE_STATS_LEN(n) \
......
...@@ -740,6 +740,7 @@ void i40e_update_stats(struct i40e_vsi *vsi) ...@@ -740,6 +740,7 @@ void i40e_update_stats(struct i40e_vsi *vsi)
u32 rx_page, rx_buf; u32 rx_page, rx_buf;
u64 rx_p, rx_b; u64 rx_p, rx_b;
u64 tx_p, tx_b; u64 tx_p, tx_b;
u32 val;
int i; int i;
u16 q; u16 q;
...@@ -972,6 +973,20 @@ void i40e_update_stats(struct i40e_vsi *vsi) ...@@ -972,6 +973,20 @@ void i40e_update_stats(struct i40e_vsi *vsi)
i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
pf->stat_offsets_loaded, pf->stat_offsets_loaded,
&osd->rx_jabber, &nsd->rx_jabber); &osd->rx_jabber, &nsd->rx_jabber);
val = rd32(hw, I40E_PRTPM_EEE_STAT);
nsd->tx_lpi_status =
(val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
nsd->rx_lpi_status =
(val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
pf->stat_offsets_loaded,
&osd->tx_lpi_count, &nsd->tx_lpi_count);
i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
pf->stat_offsets_loaded,
&osd->rx_lpi_count, &nsd->rx_lpi_count);
} }
pf->stat_offsets_loaded = true; pf->stat_offsets_loaded = true;
......
...@@ -1014,6 +1014,11 @@ struct i40e_hw_port_stats { ...@@ -1014,6 +1014,11 @@ struct i40e_hw_port_stats {
u64 tx_size_big; /* ptc9522 */ u64 tx_size_big; /* ptc9522 */
u64 mac_short_packet_dropped; /* mspdc */ u64 mac_short_packet_dropped; /* mspdc */
u64 checksum_error; /* xec */ u64 checksum_error; /* xec */
/* EEE LPI */
bool tx_lpi_status;
bool rx_lpi_status;
u64 tx_lpi_count; /* etlpic */
u64 rx_lpi_count; /* erlpic */
}; };
/* Checksum and Shadow RAM pointers */ /* Checksum and Shadow RAM pointers */
......
...@@ -1020,6 +1020,11 @@ struct i40e_hw_port_stats { ...@@ -1020,6 +1020,11 @@ struct i40e_hw_port_stats {
u64 tx_size_big; /* ptc9522 */ u64 tx_size_big; /* ptc9522 */
u64 mac_short_packet_dropped; /* mspdc */ u64 mac_short_packet_dropped; /* mspdc */
u64 checksum_error; /* xec */ u64 checksum_error; /* xec */
/* EEE LPI */
bool tx_lpi_status;
bool rx_lpi_status;
u64 tx_lpi_count; /* etlpic */
u64 rx_lpi_count; /* erlpic */
}; };
/* Checksum and Shadow RAM pointers */ /* Checksum and Shadow RAM pointers */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment