Commit bfa64c4a authored by Dave Martin's avatar Dave Martin Committed by Russell King

ARM: 6502/1: Thumb-2: Fix CONFIG_THUMB2_KERNEL breakage in compressed/head.S

Some instruction operand combinations are used here which are nor
permitted in Thumb-2.

In particular, most uses of pc as an operand are disallowed in
Thumb-2, and deprecated in ARM from ARMv7 onwards.

The modified code introduced by this patch should be compatible
with all architecture versions >= v3, with or without
CONFIG_THUMB2_KERNEL.
Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 6323875d
...@@ -174,7 +174,8 @@ not_angel: ...@@ -174,7 +174,8 @@ not_angel:
ldr sp, [r0, #28] ldr sp, [r0, #28]
#ifdef CONFIG_AUTO_ZRELADDR #ifdef CONFIG_AUTO_ZRELADDR
@ determine final kernel image address @ determine final kernel image address
and r4, pc, #0xf8000000 mov r4, pc
and r4, r4, #0xf8000000
add r4, r4, #TEXT_OFFSET add r4, r4, #TEXT_OFFSET
#else #else
ldr r4, =zreladdr ldr r4, =zreladdr
...@@ -445,7 +446,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size ...@@ -445,7 +446,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
*/ */
mov r1, #0x1e mov r1, #0x1e
orr r1, r1, #3 << 10 orr r1, r1, #3 << 10
mov r2, pc, lsr #20 mov r2, pc
mov r2, r2, lsr #20
orr r1, r1, r2, lsl #20 orr r1, r1, r2, lsl #20
add r0, r3, r2, lsl #2 add r0, r3, r2, lsl #2
str r1, [r0], #4 str r1, [r0], #4
......
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