Commit c0157bdc authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo

ARM: dts: imx: use generic name bus

Per devicetree specification, generic names
are recommended to be used, such as bus.

i.MX AIPS is a AHB - IP bridge bus, so
we could use bus as node name.

Script:
sed -i "s/\<aips@/bus@/" arch/arm/boot/dts/imx*.dtsi
sed -i "s/\<aips@/bus@/" arch/arm/boot/dts/vf*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/boot/dts/imx*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/boot/dts/vf*.dtsi
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 18432e86
......@@ -75,7 +75,7 @@ soc {
interrupt-parent = <&asic>;
ranges;
aips@43f00000 { /* AIPS1 */
bus@43f00000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -332,7 +332,7 @@ fec: ethernet@50038000 {
};
};
aips@53f00000 { /* AIPS2 */
bus@53f00000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -63,7 +63,7 @@ iram: sram@1fffc000 {
ranges = <0 0x1fffc000 0x4000>;
};
aips@43f00000 { /* AIPS1 */
bus@43f00000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -225,7 +225,7 @@ iim: iim@5001c000 {
};
};
aips@53f00000 { /* AIPS2 */
bus@53f00000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -66,7 +66,7 @@ L2: l2-cache@30000000 {
cache-level = <2>;
};
aips1: aips@43f00000 {
aips1: bus@43f00000 {
compatible = "fsl,aips", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -199,7 +199,7 @@ fec: fec@50038000 {
};
};
aips2: aips@53f00000 {
aips2: bus@53f00000 {
compatible = "fsl,aips", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -101,7 +101,7 @@ soc {
interrupt-parent = <&tzic>;
ranges;
aips@50000000 { /* AIPS1 */
bus@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -389,7 +389,7 @@ uart4: serial@53ff0000 {
};
};
aips@60000000 { /* AIPS2 */
bus@60000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -158,7 +158,7 @@ ipu_di1_disp2: endpoint {
};
};
aips@70000000 { /* AIPS1 */
bus@70000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -440,7 +440,7 @@ clks: ccm@73fd4000{
};
};
aips@80000000 { /* AIPS2 */
bus@80000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -222,7 +222,7 @@ gpu: gpu@30000000 {
clock-names = "core_clk", "mem_iface_clk";
};
aips@50000000 { /* AIPS1 */
bus@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -654,7 +654,7 @@ uart4: serial@53ff0000 {
};
};
aips@60000000 { /* AIPS2 */
bus@60000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -85,7 +85,7 @@ ocram: sram@900000 {
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
aips1: aips-bus@2000000 {
aips1: bus@2000000 {
iomuxc: iomuxc@20e0000 {
compatible = "fsl,imx6dl-iomuxc";
};
......@@ -101,7 +101,7 @@ epdc: epdc@20f4000 {
};
};
aips2: aips-bus@2100000 {
aips2: bus@2100000 {
i2c4: i2c@21f8000 {
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -164,7 +164,7 @@ ocram: sram@900000 {
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
aips-bus@2000000 { /* AIPS1 */
bus@2000000 { /* AIPS1 */
spba-bus@2000000 {
ecspi5: spi@2018000 {
#address-cells = <1>;
......
......@@ -294,7 +294,7 @@ pcie: pcie@1ffc000 {
status = "disabled";
};
aips-bus@2000000 { /* AIPS1 */
bus@2000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -935,7 +935,7 @@ sdma: sdma@20ec000 {
};
};
aips-bus@2100000 { /* AIPS2 */
bus@2100000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -18,7 +18,7 @@ ocram3: sram@960000 {
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
aips-bus@2100000 {
bus@2100000 {
pre1: pre@21c8000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021c8000 0x1000>;
......
......@@ -143,7 +143,7 @@ L2: l2-cache@a02000 {
arm,data-latency = <4 2 3>;
};
aips1: aips-bus@2000000 {
aips1: bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -786,7 +786,7 @@ dcp: dcp@20fc000 {
};
};
aips2: aips-bus@2100000 {
aips2: bus@2100000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -144,7 +144,7 @@ L2: l2-cache@a02000 {
arm,data-latency = <4 2 3>;
};
aips1: aips-bus@2000000 {
aips1: bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -663,7 +663,7 @@ dcp: dcp@20fc000 {
};
};
aips2: aips-bus@2100000 {
aips2: bus@2100000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -235,7 +235,7 @@ gpmi: gpmi-nand@1806000{
status = "disabled";
};
aips1: aips-bus@2000000 {
aips1: bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -830,7 +830,7 @@ sdma: sdma@20ec000 {
};
};
aips2: aips-bus@2100000 {
aips2: bus@2100000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -1188,7 +1188,7 @@ i2c4: i2c@21f8000 {
};
};
aips3: aips-bus@2200000 {
aips3: bus@2200000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -204,7 +204,7 @@ gpmi: gpmi-nand@1806000 {
status = "disabled";
};
aips1: aips-bus@2000000 {
aips1: bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -771,7 +771,7 @@ pwm8: pwm@20fc000 {
};
};
aips2: aips-bus@2100000 {
aips2: bus@2100000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -51,7 +51,7 @@ &usdhc2 {
/ {
soc {
aips3: aips-bus@2200000 {
aips3: bus@2200000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -315,7 +315,7 @@ intc: interrupt-controller@31001000 {
<0x31006000 0x2000>;
};
aips1: aips-bus@30000000 {
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -663,7 +663,7 @@ pgc_hsic_phy: power-domain@2 {
};
};
aips2: aips-bus@30400000 {
aips2: bus@30400000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -803,7 +803,7 @@ mipi_vc0_to_csi_mux: endpoint {
};
};
aips3: aips-bus@30800000 {
aips3: bus@30800000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -23,7 +23,7 @@ a5_cpu: cpu@0 {
};
soc {
aips-bus@40000000 {
bus@40000000 {
intc: interrupt-controller@40003000 {
compatible = "arm,cortex-a9-gic";
......@@ -43,7 +43,7 @@ global_timer: timer@40002200 {
};
};
aips-bus@40080000 {
bus@40080000 {
pmu@40089000 {
compatible = "arm,cortex-a5-pmu";
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -59,7 +59,7 @@ soc {
interrupt-parent = <&mscm_ir>;
ranges;
aips0: aips-bus@40000000 {
aips0: bus@40000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -471,7 +471,7 @@ src: src@4006e000 {
};
};
aips1: aips-bus@40080000 {
aips1: bus@40080000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......
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