Commit c1482c16 authored by Dave Jones's avatar Dave Jones

Merge tetrachloride.(none):/mnt/stuff/kernel/2.5/bk-linus

into tetrachloride.(none):/mnt/stuff/kernel/2.5/agpgart
parents d127326d f0a6ec87
...@@ -61,6 +61,16 @@ config AGP_VIA ...@@ -61,6 +61,16 @@ config AGP_VIA
You should say Y here if you use XFree86 3.3.6 or 4.x and want to You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N. use GLX or DRI. If unsure, say N.
config AGP_VIA_KT400
tristate "VIA KT400 chipset support"
depends on AGP3
help
This option gives you AGP support for the GLX component of the
XFree86 4.x on VIA KT400 AGP 3.0 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
config AGP_AMD config AGP_AMD
tristate "AMD Irongate, 761, and 762 support" tristate "AMD Irongate, 761, and 762 support"
depends on AGP depends on AGP
......
...@@ -12,6 +12,7 @@ obj-$(CONFIG_AGP) += agpgart.o ...@@ -12,6 +12,7 @@ obj-$(CONFIG_AGP) += agpgart.o
obj-$(CONFIG_AGP_INTEL) += intel-agp.o obj-$(CONFIG_AGP_INTEL) += intel-agp.o
obj-$(CONFIG_AGP_VIA) += via-agp.o obj-$(CONFIG_AGP_VIA) += via-agp.o
obj-$(CONFIG_AGP_VIA_KT400) += via-kt400.o
obj-$(CONFIG_AGP_AMD) += amd-k7-agp.o obj-$(CONFIG_AGP_AMD) += amd-k7-agp.o
obj-$(CONFIG_AGP_SIS) += sis-agp.o obj-$(CONFIG_AGP_SIS) += sis-agp.o
obj-$(CONFIG_AGP_ALI) += ali-agp.o obj-$(CONFIG_AGP_ALI) += ali-agp.o
......
/* /*
* AGPGART module version 0.99 * AGPGART module
* Copyright (C) 2002 Dave Jones
* Copyright (C) 1999 Jeff Hartmann * Copyright (C) 1999 Jeff Hartmann
* Copyright (C) 1999 Precision Insight, Inc. * Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc. * Copyright (C) 1999 Xi Graphics, Inc.
...@@ -46,6 +47,7 @@ void agp_generic_destroy_page(void *addr); ...@@ -46,6 +47,7 @@ void agp_generic_destroy_page(void *addr);
int agp_generic_suspend(void); int agp_generic_suspend(void);
void agp_generic_resume(void); void agp_generic_resume(void);
void agp_free_key(int key); void agp_free_key(int key);
int agp_num_entries(void);
#define PFX "agpgart: " #define PFX "agpgart: "
...@@ -292,6 +294,9 @@ struct agp_bridge_data { ...@@ -292,6 +294,9 @@ struct agp_bridge_data {
#define VIA_ATTBASE 0x88 #define VIA_ATTBASE 0x88
/* VIA KT400 */ /* VIA KT400 */
#define VIA_AGP3_GARTCTRL 0x90
#define VIA_AGP3_APSIZE 0x94
#define VIA_AGP3_ATTBASE 0x98
#define VIA_AGPSEL 0xfd #define VIA_AGPSEL 0xfd
/* SiS registers */ /* SiS registers */
......
...@@ -14,8 +14,6 @@ ...@@ -14,8 +14,6 @@
#include <linux/agp_backend.h> #include <linux/agp_backend.h>
#include "agp.h" #include "agp.h"
extern int agp_memory_reserved;
static u_int64_t pci_read64 (struct pci_dev *dev, int reg) static u_int64_t pci_read64 (struct pci_dev *dev, int reg)
{ {
union { union {
...@@ -48,16 +46,11 @@ static void pci_write64 (struct pci_dev *dev, int reg, u64 value) ...@@ -48,16 +46,11 @@ static void pci_write64 (struct pci_dev *dev, int reg, u64 value)
static int x86_64_insert_memory(agp_memory * mem, off_t pg_start, int type) static int x86_64_insert_memory(agp_memory * mem, off_t pg_start, int type)
{ {
int i, j, num_entries; int i, j, num_entries;
void *temp;
long tmp; long tmp;
u32 pte; u32 pte;
u64 addr; u64 addr;
temp = agp_bridge.current_size; num_entries = agp_num_entries();
num_entries = A_SIZE_32(temp)->num_entries;
num_entries -= agp_memory_reserved>>PAGE_SHIFT;
if (type != 0 || mem->type != 0) if (type != 0 || mem->type != 0)
return -EINVAL; return -EINVAL;
......
/* /*
* AGPGART module version 1.0 * AGPGART driver backend routines.
* Copyright (C) 2002 Dave Jones. * Copyright (C) 2002 Dave Jones.
* Copyright (C) 1999 Jeff Hartmann. * Copyright (C) 1999 Jeff Hartmann.
* Copyright (C) 1999 Precision Insight, Inc. * Copyright (C) 1999 Precision Insight, Inc.
......
/* /*
* AGPGART module frontend version 0.99 * AGPGART driver frontend
* Copyright (C) 2002 Dave Jones
* Copyright (C) 1999 Jeff Hartmann * Copyright (C) 1999 Jeff Hartmann
* Copyright (C) 1999 Precision Insight, Inc. * Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc. * Copyright (C) 1999 Xi Graphics, Inc.
......
/*
* Generic routines for AGP 3.0 compliant bridges.
*/
#include <linux/list.h> #include <linux/list.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/agp_backend.h> #include <linux/agp_backend.h>
...@@ -393,8 +397,7 @@ static int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -393,8 +397,7 @@ static int agp_3_0_node_enable(u32 mode, u32 minor)
if(mcapndx == 0) { if(mcapndx == 0) {
printk(KERN_ERR PFX "woah! Non-AGP device " printk(KERN_ERR PFX "woah! Non-AGP device "
"found on the secondary bus of an AGP 3.0 " "found on the secondary bus of an AGP 3.0 bridge!\n");
"bridge!\n");
ret = -ENODEV; ret = -ENODEV;
goto free_and_exit; goto free_and_exit;
} }
...@@ -442,9 +445,8 @@ static int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -442,9 +445,8 @@ static int agp_3_0_node_enable(u32 mode, u32 minor)
rate = 0x2; rate = 0x2;
break; break;
default: default:
printk(KERN_ERR PFX "woah! Bogus AGP rate " printk(KERN_ERR PFX "woah! Bogus AGP rate (%d) "
"value found advertised behind an AGP 3.0 " "value found advertised behind an AGP 3.0 bridge!\n", rate);
"bridge!\n");
ret = -ENODEV; ret = -ENODEV;
goto free_and_exit; goto free_and_exit;
} }
...@@ -455,12 +457,10 @@ static int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -455,12 +457,10 @@ static int agp_3_0_node_enable(u32 mode, u32 minor)
* whether isochronous transfers are supported. * whether isochronous transfers are supported.
*/ */
if(isoch != 0) { if(isoch != 0) {
if((ret = agp_3_0_isochronous_node_enable(dev_list, if((ret = agp_3_0_isochronous_node_enable(dev_list, ndevs)) != 0)
ndevs)) != 0)
goto free_and_exit; goto free_and_exit;
} else { } else {
if((ret = agp_3_0_nonisochronous_node_enable(dev_list, if((ret = agp_3_0_nonisochronous_node_enable(dev_list,ndevs)) != 0)
ndevs)) != 0)
goto free_and_exit; goto free_and_exit;
} }
...@@ -534,8 +534,7 @@ int agp_generic_agp_3_0_enable(u32 mode) ...@@ -534,8 +534,7 @@ int agp_generic_agp_3_0_enable(u32 mode)
major = (ncapid >> 20) & 0xf; major = (ncapid >> 20) & 0xf;
minor = (ncapid >> 16) & 0xf; minor = (ncapid >> 16) & 0xf;
printk(KERN_INFO PFX "Found an AGP %d.%d compliant device.\n", printk(KERN_INFO PFX "Found an AGP %d.%d compliant device.\n",major, minor);
major, minor);
if(major >= 3) { if(major >= 3) {
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + 0x4, &agp_3_0); pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + 0x4, &agp_3_0);
......
/* /*
* AGPGART module version 1.0 * AGPGART driver.
* Copyright (C) 2002 Dave Jones. * Copyright (C) 2002 Dave Jones.
* Copyright (C) 1999 Jeff Hartmann. * Copyright (C) 1999 Jeff Hartmann.
* Copyright (C) 1999 Precision Insight, Inc. * Copyright (C) 1999 Precision Insight, Inc.
...@@ -203,6 +203,40 @@ static int agp_return_size(void) ...@@ -203,6 +203,40 @@ static int agp_return_size(void)
return current_size; return current_size;
} }
int agp_num_entries(void)
{
int num_entries;
void *temp;
temp = agp_bridge.current_size;
switch (agp_bridge.size_type) {
case U8_APER_SIZE:
num_entries = A_SIZE_8(temp)->num_entries;
break;
case U16_APER_SIZE:
num_entries = A_SIZE_16(temp)->num_entries;
break;
case U32_APER_SIZE:
num_entries = A_SIZE_32(temp)->num_entries;
break;
case LVL2_APER_SIZE:
num_entries = A_SIZE_LVL2(temp)->num_entries;
break;
case FIXED_APER_SIZE:
num_entries = A_SIZE_FIX(temp)->num_entries;
break;
default:
num_entries = 0;
break;
}
num_entries -= agp_memory_reserved>>PAGE_SHIFT;
if (num_entries<0)
num_entries = 0;
return num_entries;
}
/* Routine to copy over information structure */ /* Routine to copy over information structure */
int agp_copy_info(agp_kern_info * info) int agp_copy_info(agp_kern_info * info)
...@@ -713,3 +747,5 @@ EXPORT_SYMBOL(agp_generic_alloc_by_type); ...@@ -713,3 +747,5 @@ EXPORT_SYMBOL(agp_generic_alloc_by_type);
EXPORT_SYMBOL(agp_generic_free_by_type); EXPORT_SYMBOL(agp_generic_free_by_type);
EXPORT_SYMBOL(global_cache_flush); EXPORT_SYMBOL(global_cache_flush);
EXPORT_SYMBOL_GPL(agp_num_entries);
...@@ -1467,7 +1467,9 @@ static struct __initdata pci_driver agp_intel_pci_driver = { ...@@ -1467,7 +1467,9 @@ static struct __initdata pci_driver agp_intel_pci_driver = {
.probe = agp_intel_probe, .probe = agp_intel_probe,
}; };
static int __init agp_intel_init(void) /* intel_agp_init() must not be declared static for explicit
early initialization to work (ie i810fb) */
int __init agp_intel_init(void)
{ {
int ret_val; int ret_val;
static int agp_initialised=0; static int agp_initialised=0;
......
...@@ -124,65 +124,23 @@ static int __init via_generic_setup (struct pci_dev *pdev) ...@@ -124,65 +124,23 @@ static int __init via_generic_setup (struct pci_dev *pdev)
return 0; return 0;
} }
#ifdef CONFIG_AGP3
/* /*
* The KT400 does magick to put the AGP bridge compliant with the same * The KT400 does magick to put the AGP bridge compliant with the same
* standards version as the graphics card. If we haven't fallen into * standards version as the graphics card. If we haven't fallen into
* 2.0 compatability mode, we run the normal 3.0 code, and fall back * 2.0 compatability mode, we abort, as this gets picked up by
* if something nasty happens. * via-agp3.o
*/ */
static void __init via_kt400_enable(u32 mode)
{
if ((agp_generic_agp_3_0_enable(mode))==FALSE)
/* Something weird happened, fall back to 2.0 */
agp_generic_agp_enable(mode);
}
#endif
static int __init via_kt400_setup(struct pci_dev *pdev) static int __init via_kt400_setup(struct pci_dev *pdev)
{ {
u8 reg; u8 reg;
agp_bridge.masks = via_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) via_generic_sizes;
agp_bridge.size_type = U8_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.configure = via_configure;
agp_bridge.fetch_size = via_fetch_size;
agp_bridge.cleanup = via_cleanup;
agp_bridge.tlb_flush = via_tlbflush;
agp_bridge.mask_memory = via_mask_memory;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = agp_generic_alloc_page;
agp_bridge.agp_destroy_page = agp_generic_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
pci_read_config_byte(pdev, VIA_AGPSEL, &reg); pci_read_config_byte(pdev, VIA_AGPSEL, &reg);
/* Check AGP 2.0 compatability mode. */
if ((reg & (1<<1))==1) { if ((reg & (1<<1))==1) {
/* AGP 2.0 compatability mode. */ via_generic_setup(pdev);
agp_bridge.agp_enable = agp_generic_agp_enable; return 0;
} else {
#ifdef CONFIG_AGP3
/* AGP 3.0 mode */
agp_bridge.agp_enable = via_kt400_enable;
#else
printk ("AGP: VIA KT400 in AGP3.0 mode support not compiled in.\n");
return -ENODEV;
#endif
} }
return 0; return -ENODEV;
} }
static struct agp_device_ids via_agp_device_ids[] __initdata = static struct agp_device_ids via_agp_device_ids[] __initdata =
...@@ -244,6 +202,11 @@ static struct agp_device_ids via_agp_device_ids[] __initdata = ...@@ -244,6 +202,11 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
.chipset = VIA_VT8605, .chipset = VIA_VT8605,
.chipset_name = "Apollo ProSavage PM133" .chipset_name = "Apollo ProSavage PM133"
}, },
{
.device_id = PCI_DEVICE_ID_VIA_8235_0,
.chipset = VIA_P4X400,
.chipset_name = "P4X400"
},
{ }, /* dummy final entry, always present */ { }, /* dummy final entry, always present */
}; };
......
/*
* VIA KT400 AGPGART routines.
*
* The KT400 does magick to put the AGP bridge compliant with the same
* standards version as the graphics card. If we haven't fallen into
* 2.0 compatability mode, we run this code. Otherwise, we run the
* code in via-agp.c
*/
#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
static int via_fetch_size(void)
{
int i;
u8 temp;
struct aper_size_info_16 *values;
values = A_SIZE_16(agp_bridge.aperture_sizes);
pci_read_config_byte(agp_bridge.dev, VIA_AGP3_APSIZE, &temp);
for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
if (temp == values[i].size_value) {
agp_bridge.previous_size =
agp_bridge.current_size = (void *) (values + i);
agp_bridge.aperture_size_idx = i;
return values[i].size;
}
}
return 0;
}
static int via_configure(void)
{
u32 temp;
struct aper_size_info_16 *current_size;
current_size = A_SIZE_16(agp_bridge.current_size);
/* address to map too */
pci_read_config_dword(agp_bridge.dev, VIA_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase - aperture GATT base */
pci_write_config_dword(agp_bridge.dev, VIA_AGP3_ATTBASE,
agp_bridge.gatt_bus_addr & 0xfffff000);
return 0;
}
static void via_cleanup(void)
{
struct aper_size_info_16 *previous_size;
previous_size = A_SIZE_16(agp_bridge.previous_size);
pci_write_config_byte(agp_bridge.dev, VIA_APSIZE, previous_size->size_value);
}
static void via_tlbflush(agp_memory * mem)
{
u32 temp;
pci_read_config_dword(agp_bridge.dev, VIA_AGP3_GARTCTRL, &temp);
pci_write_config_dword(agp_bridge.dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
pci_write_config_dword(agp_bridge.dev, VIA_AGP3_GARTCTRL, temp);
}
static unsigned long via_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge.masks[0].mask;
}
static struct aper_size_info_16 via_generic_sizes[11] =
{
{ 4, 1024, 0, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2|1<<1|1<<0 },
{ 8, 2048, 1, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2|1<<1},
{ 16, 4096, 2, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2},
{ 32, 8192, 3, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3},
{ 64, 16384, 4, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4},
{ 128, 32768, 5, 1<<11|1<<10|1<<9|1<<8|1<<5},
{ 256, 65536, 6, 1<<11|1<<10|1<<9|1<<8},
{ 512, 131072, 7, 1<<11|1<<10|1<<9},
{ 1024, 262144, 8, 1<<11|1<<10},
{ 2048, 524288, 9, 1<<11} /* 2GB <- Max supported */
};
static struct gatt_mask via_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
static void __init via_kt400_enable(u32 mode)
{
if ((agp_generic_agp_3_0_enable(mode))==FALSE)
printk (KERN_INFO PFX "agp_generic_agp_3_0_enable() failed\n");
}
static int __init agp_via_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
u8 reg;
u8 cap_ptr = 0;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
pci_read_config_byte(dev, VIA_AGPSEL, &reg);
/* Check if we are in AGP 2.0 compatability mode, if so it
* will be picked up by via-agp.o */
if ((reg & (1<<1))==1)
return -ENODEV;
printk (KERN_INFO PFX "Detected VIA KT400 AGP3 chipset\n");
agp_bridge.dev = dev;
agp_bridge.type = VIA_APOLLO_KT400_3;
agp_bridge.capndx = cap_ptr;
agp_bridge.masks = via_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) via_generic_sizes;
agp_bridge.size_type = U8_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.agp_enable = via_kt400_enable;
agp_bridge.configure = via_configure;
agp_bridge.fetch_size = via_fetch_size;
agp_bridge.cleanup = via_cleanup;
agp_bridge.tlb_flush = via_tlbflush;
agp_bridge.mask_memory = via_mask_memory;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = agp_generic_alloc_page;
agp_bridge.agp_destroy_page = agp_generic_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
agp_register_driver(dev);
return 0;
}
static struct pci_device_id agp_via_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_8377_0,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
static struct __initdata pci_driver agp_via_pci_driver = {
.name = "agpgart-via",
.id_table = agp_via_pci_table,
.probe = agp_via_probe,
};
static int __init agp_via_init(void)
{
int ret_val;
ret_val = pci_module_init(&agp_via_pci_driver);
if (ret_val)
agp_bridge.type = NOT_SUPPORTED;
return ret_val;
}
static void __exit agp_via_cleanup(void)
{
agp_unregister_driver();
pci_unregister_driver(&agp_via_pci_driver);
}
module_init(agp_via_init);
module_exit(agp_via_cleanup);
MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
MODULE_LICENSE("GPL and additional rights");
...@@ -60,8 +60,10 @@ enum chipset_type { ...@@ -60,8 +60,10 @@ enum chipset_type {
VIA_APOLLO_KX133, VIA_APOLLO_KX133,
VIA_APOLLO_KT133, VIA_APOLLO_KT133,
VIA_APOLLO_KT400, VIA_APOLLO_KT400,
VIA_APOLLO_KT400_3,
VIA_APOLLO_PRO_266, VIA_APOLLO_PRO_266,
VIA_VT8605, VIA_VT8605,
VIA_P4X400,
SIS_GENERIC, SIS_GENERIC,
AMD_GENERIC, AMD_GENERIC,
AMD_IRONGATE, AMD_IRONGATE,
......
...@@ -1092,6 +1092,7 @@ ...@@ -1092,6 +1092,7 @@
#define PCI_DEVICE_ID_VIA_8233C_0 0x3109 #define PCI_DEVICE_ID_VIA_8233C_0 0x3109
#define PCI_DEVICE_ID_VIA_8361 0x3112 #define PCI_DEVICE_ID_VIA_8361 0x3112
#define PCI_DEVICE_ID_VIA_8233A 0x3147 #define PCI_DEVICE_ID_VIA_8233A 0x3147
#define PCI_DEVICE_ID_VIA_8235_0 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177 #define PCI_DEVICE_ID_VIA_8235 0x3177
#define PCI_DEVICE_ID_VIA_8377_0 0x3189 #define PCI_DEVICE_ID_VIA_8377_0 0x3189
#define PCI_DEVICE_ID_VIA_86C100A 0x6100 #define PCI_DEVICE_ID_VIA_86C100A 0x6100
......
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