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Commit c26082dd authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds
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[PATCH] mips: MIPS updates 

 - Remove support for NEC Eagle which is a system that was produced in
   almost zero numbers.
 - Sort out the MV-64340 code a little more.
 - Fix computation of interrupts masks for the upper 32 interrupts of the
   MV-64340.
 - Gas was producing bad break codes for MIPS32/MIPS64 processors for a while.
   Add a workaround to the kernel trap handler.
 - Rewrite RM7000 cache code in a way where it's hopefully easier to read.
 - Handle 64-bit pointers right for the BCM1250.
 - Try to share code for GT-64240 and MV-64340.
 - Fix RM9000 definition of _CACHE_CACHABLE_NONCOHERENT.
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 30f2e50f
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Inline Side-by-side
Showing with 606 additions and 2065 deletions
arch/mips/Kconfig
View file @ c26082dd
......@@ -91,13 +91,6 @@ config IBM_WORKPAD
select IRQ_CPU
select ISA
config NEC_EAGLE
bool "Support for NEC Eagle/Hawk board"
select DMA_NONCOHERENT
select IRQ_CPU
depends on MACH_VR41XX
select HW_HAS_PCI
config TANBAC_TB0226
bool "Support for TANBAC TB0226 (Mbase)"
depends on MACH_VR41XX
......@@ -311,6 +304,7 @@ config MOMENCO_OCELOT_G
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select PCI_MARVELL
select RM7000_CPU_SCACHE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
......@@ -321,6 +315,8 @@ config MOMENCO_OCELOT_C
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_MV64340
select PCI_MARVELL
select RM7000_CPU_SCACHE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
......@@ -332,7 +328,9 @@ config MOMENCO_JAGUAR_ATX
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select IRQ_MV64340
select LIMITED_DMA
select PCI_MARVELL
select RM7000_CPU_SCACHE
help
The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
......@@ -885,7 +883,7 @@ config MIPS_NILE4
config CPU_LITTLE_ENDIAN
bool "Generate little endian code"
default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
help
Some MIPS machines can be configured for either little or big endian
......@@ -898,6 +896,9 @@ config IRQ_CPU
config IRQ_CPU_RM7K
bool
config IRQ_MV64340
bool
config DDB5XXX_COMMON
bool
depends on DDB5074 || DDB5476 || DDB5477
......@@ -918,16 +919,14 @@ config MIPS_GT64120
depends on MIPS_EV64120 || MIPS_EV96100 || LASAT || MIPS_ATLAS || MIPS_MALTA || MOMENCO_OCELOT
default y
config MIPS_MV64340
bool
depends on MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_C
default y
config MIPS_TX3927
bool
depends on TOSHIBA_JMR3927
default y
config PCI_MARVELL
bool
config ITE_BOARD_GEN
bool
depends on MIPS_IVR || MIPS_ITE8172
......
arch/mips/Makefile
View file @ c26082dd
......@@ -463,12 +463,6 @@ load-$(CONFIG_NEC_OSPREY) += 0x80002000
core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
#
# NEC Eagle/Hawk (VR4122/VR4131) board
#
core-$(CONFIG_NEC_EAGLE) += arch/mips/vr41xx/nec-eagle/
load-$(CONFIG_NEC_EAGLE) += 0x80000000
#
# ZAO Networks Capcella (VR4131)
#
......
arch/mips/configs/atlas_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -143,6 +144,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -169,7 +171,7 @@ CONFIG_TRAD_SIGNALS=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
......@@ -212,13 +214,13 @@ CONFIG_BLK_DEV_SD=y
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
......@@ -321,6 +323,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -650,5 +653,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/bosporus_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/capcella_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_VICTOR_MPC30X is not set
......@@ -147,6 +147,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -172,7 +173,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -185,6 +186,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -283,6 +285,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -624,5 +627,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/cobalt_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -137,6 +138,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -163,7 +165,7 @@ CONFIG_TRAD_SIGNALS=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -176,6 +178,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -270,6 +273,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -600,5 +604,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/db1000_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -167,6 +168,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -293,6 +295,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -634,6 +637,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -688,6 +692,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/db1100_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -165,6 +166,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -291,6 +293,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -629,6 +632,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -683,6 +687,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/db1500_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -167,6 +168,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -259,6 +261,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
CONFIG_BLK_DEV_IDECS=m
......@@ -372,6 +375,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -706,6 +710,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -760,6 +765,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/ddb5476_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -139,6 +140,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -166,7 +168,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -179,6 +181,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -282,6 +285,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -485,6 +489,7 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# Graphics support
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
......@@ -640,5 +645,6 @@ CONFIG_CMDLINE="ip=any"
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/ddb5477_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -138,6 +139,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -163,7 +165,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -251,6 +253,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -306,6 +309,7 @@ CONFIG_PCNET32=y
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
#
......@@ -599,5 +603,6 @@ CONFIG_CMDLINE="ip=any"
#
# Library routines
#
CONFIG_CRC16=y
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
arch/mips/configs/decstation_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -137,6 +138,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -277,6 +279,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -554,7 +557,6 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
CONFIG_ULTRIX_PARTITION=y
# CONFIG_SUN_PARTITION is not set
......@@ -585,5 +587,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
arch/mips/configs/e55_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
CONFIG_CASIO_E55=y
# CONFIG_IBM_WORKPAD is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_VICTOR_MPC30X is not set
......@@ -143,6 +143,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -178,6 +179,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -277,6 +279,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -603,5 +606,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/eagle_defconfig deleted 100644 → 0
View file @ 30f2e50f
This diff is collapsed.
arch/mips/configs/ev64120_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -146,6 +147,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -171,7 +173,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -258,6 +260,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -592,5 +595,6 @@ CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/d
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/ev96100_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -146,6 +147,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -252,6 +254,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -549,5 +552,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/ip22_defconfig
View file @ c26082dd
......@@ -29,6 +29,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -148,6 +149,7 @@ CONFIG_BINFMT_IRIX=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -362,6 +364,8 @@ CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_COMPAT_IPFWADM=m
CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_MATCH_REALM=m
#
# IPv6: Netfilter Configuration
......@@ -438,8 +442,11 @@ CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
#
......@@ -696,6 +703,8 @@ CONFIG_UDF_FS=m
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
......@@ -767,7 +776,6 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
......@@ -801,6 +809,7 @@ CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
......@@ -855,6 +864,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/ip27_defconfig
View file @ c26082dd
......@@ -27,6 +27,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -153,6 +154,7 @@ CONFIG_BINFMT_ELF32=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -178,7 +180,7 @@ CONFIG_BINFMT_ELF32=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
#
......@@ -218,12 +220,12 @@ CONFIG_SCSI_SPI_ATTRS=y
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
......@@ -338,6 +340,7 @@ CONFIG_NET_SCH_TBF=y
CONFIG_NET_SCH_GRED=y
CONFIG_NET_SCH_DSMARK=y
CONFIG_NET_SCH_DELAY=y
# CONFIG_NET_SCH_INGRESS is not set
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
......@@ -346,8 +349,11 @@ CONFIG_NET_CLS_ROUTE4=y
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_CLS_RSVP=y
CONFIG_NET_CLS_RSVP6=y
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
#
......@@ -657,7 +663,6 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
......@@ -707,6 +712,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/ip32_defconfig
View file @ c26082dd
......@@ -20,6 +20,7 @@ CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
......@@ -27,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -141,6 +143,7 @@ CONFIG_BINFMT_ELF32=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -167,7 +170,7 @@ CONFIG_BINFMT_ELF32=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
#
......@@ -208,6 +211,7 @@ CONFIG_SCSI_LOGGING=y
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
CONFIG_SCSI_AIC7XXX=y
......@@ -219,7 +223,6 @@ CONFIG_AIC7XXX_DEBUG_MASK=0
CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
......@@ -321,6 +324,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -632,7 +636,6 @@ CONFIG_PARTITION_ADVANCED=y
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
......@@ -663,5 +666,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/it8172_defconfig
View file @ c26082dd
......@@ -21,6 +21,7 @@ CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
......@@ -28,6 +29,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -141,6 +143,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -231,6 +234,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -326,6 +330,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -650,5 +655,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/ivr_defconfig
View file @ c26082dd
......@@ -21,6 +21,7 @@ CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
......@@ -28,6 +29,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -141,6 +143,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -166,7 +169,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -179,6 +182,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -276,6 +280,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -604,5 +609,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/jaguar-atx_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -39,7 +40,10 @@ CONFIG_IOSCHED_CFQ=y
#
# Loadable module support
#
# CONFIG_MODULES is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
CONFIG_KMOD=y
#
# Machine selection
......@@ -73,7 +77,8 @@ CONFIG_LIMITED_DMA=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_MIPS_MV64340=y
CONFIG_IRQ_MV64340=y
CONFIG_PCI_MARVELL=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
......@@ -140,6 +145,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -164,7 +170,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -234,6 +240,7 @@ CONFIG_IP_PNP_BOOTP=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -286,6 +293,7 @@ CONFIG_EEPRO100=y
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_VELOCITY is not set
#
# Ethernet (1000 Mbit)
......@@ -538,5 +546,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/jmr3927_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -137,6 +138,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -162,7 +164,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -250,6 +252,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -460,6 +463,7 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# Graphics support
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
......@@ -612,5 +616,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/lasat200_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -148,6 +149,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -229,7 +231,7 @@ CONFIG_MTD_LASAT=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -242,6 +244,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_BLK_DEV_IDECD is not set
......@@ -365,6 +368,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -698,5 +702,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
arch/mips/configs/malta_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -150,6 +151,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -175,7 +177,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
......@@ -264,6 +266,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -319,6 +322,7 @@ CONFIG_PCNET32=y
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
#
......@@ -613,5 +617,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
arch/mips/configs/mirage_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/mpc30x_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
CONFIG_VICTOR_MPC30X=y
......@@ -147,6 +147,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -172,7 +173,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -261,6 +262,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +609,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/mtx1_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/ocelot_c_defconfig
View file @ c26082dd
......@@ -27,6 +27,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -74,7 +75,8 @@ CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_MIPS_MV64340=y
CONFIG_IRQ_MV64340=y
CONFIG_PCI_MARVELL=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
......@@ -139,6 +141,7 @@ CONFIG_BINFMT_ELF32=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -164,7 +167,7 @@ CONFIG_BINFMT_ELF32=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
#
......@@ -250,6 +253,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -580,5 +584,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/ocelot_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -144,6 +145,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -250,6 +252,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -548,5 +551,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/ocelot_g_defconfig
View file @ c26082dd
......@@ -27,6 +27,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -75,6 +76,7 @@ CONFIG_DMA_NONCOHERENT=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_PCI_MARVELL=y
CONFIG_SWAP_IO_SPACE=y
# CONFIG_SYSCLK_75 is not set
# CONFIG_SYSCLK_83 is not set
......@@ -142,6 +144,7 @@ CONFIG_BINFMT_ELF32=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -167,7 +170,7 @@ CONFIG_BINFMT_ELF32=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
#
......@@ -253,6 +256,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -583,5 +587,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/osprey_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -135,6 +136,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -242,6 +244,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -540,5 +543,6 @@ CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0"
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
arch/mips/configs/pb1000_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/pb1100_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/pb1500_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -150,6 +151,7 @@ CONFIG_MMU=y
CONFIG_PCMCIA=m
# CONFIG_PCMCIA_DEBUG is not set
# CONFIG_YENTA is not set
CONFIG_PD6729=m
# CONFIG_I82092 is not set
# CONFIG_TCIC is not set
# CONFIG_PCMCIA_AU1X00 is not set
......@@ -173,6 +175,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -200,7 +203,7 @@ CONFIG_TRAD_SIGNALS=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -213,6 +216,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECS is not set
......@@ -357,6 +361,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -721,6 +726,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -775,6 +781,7 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/pb1550_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -149,6 +150,7 @@ CONFIG_MMU=y
CONFIG_PCMCIA=m
# CONFIG_PCMCIA_DEBUG is not set
# CONFIG_YENTA is not set
CONFIG_PD6729=m
# CONFIG_I82092 is not set
# CONFIG_TCIC is not set
CONFIG_PCMCIA_AU1X00=m
......@@ -172,6 +174,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -199,7 +202,7 @@ CONFIG_TRAD_SIGNALS=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -212,6 +215,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECS is not set
......@@ -356,6 +360,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -720,6 +725,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -774,6 +780,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/rm200_defconfig
View file @ c26082dd
......@@ -21,6 +21,7 @@ CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
......@@ -29,6 +30,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -152,6 +154,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -218,7 +221,7 @@ CONFIG_PARIDE_ON26=m
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_LBD is not set
......@@ -261,6 +264,7 @@ CONFIG_SCSI_SPI_ATTRS=y
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
......@@ -270,7 +274,6 @@ CONFIG_SCSI_SPI_ATTRS=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_SATA is not set
......@@ -335,6 +338,9 @@ CONFIG_MD_RAID5=m
CONFIG_MD_MULTIPATH=m
CONFIG_BLK_DEV_DM=m
# CONFIG_DM_CRYPT is not set
# CONFIG_DM_SNAPSHOT is not set
# CONFIG_DM_MIRROR is not set
# CONFIG_DM_ZERO is not set
#
# Fusion MPT device support
......@@ -453,6 +459,8 @@ CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_COMPAT_IPFWADM=m
CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_RAW=m
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
# CONFIG_IP_NF_MATCH_REALM is not set
#
# IPv6: Netfilter Configuration
......@@ -554,8 +562,11 @@ CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
#
......@@ -655,6 +666,7 @@ CONFIG_EEPRO100=m
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
# CONFIG_NET_POCKET is not set
......@@ -880,6 +892,7 @@ CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_RW_DETECT is not set
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_DPCM=y
......@@ -1089,6 +1102,8 @@ CONFIG_UDF_FS=m
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
# CONFIG_NTFS_RW is not set
......@@ -1148,6 +1163,7 @@ CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_POSIX is not set
CONFIG_NCP_FS=m
CONFIG_NCPFS_PACKET_SIGNING=y
CONFIG_NCPFS_IOCTL_LOCKING=y
......@@ -1177,7 +1193,6 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
......@@ -1211,6 +1226,7 @@ CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
......@@ -1265,6 +1281,7 @@ CONFIG_CRYPTO_TEST=m
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=m
......
arch/mips/configs/sb1250-swarm_defconfig
View file @ c26082dd
......@@ -27,6 +27,7 @@ CONFIG_LOG_BUF_SHIFT=15
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -179,6 +180,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -204,7 +206,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=9220
CONFIG_BLK_DEV_INITRD=y
......@@ -219,6 +221,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
CONFIG_BLK_DEV_IDECD=y
......@@ -317,6 +320,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -649,6 +653,7 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/sead_defconfig
View file @ c26082dd
......@@ -27,6 +27,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -139,6 +140,7 @@ CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -428,5 +430,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/tb0226_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_NEC_EAGLE is not set
CONFIG_TANBAC_TB0226=y
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_VICTOR_MPC30X is not set
......@@ -143,6 +143,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -178,6 +179,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_BLK_DEV_IDECD is not set
......@@ -310,6 +312,7 @@ CONFIG_SYN_COOKIES=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -553,6 +556,8 @@ CONFIG_ZISOFS_FS=y
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
......@@ -644,6 +649,7 @@ CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -679,6 +685,7 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/tb0229_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_TANBAC_TB0226 is not set
CONFIG_TANBAC_TB0229=y
# CONFIG_VICTOR_MPC30X is not set
......@@ -148,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -174,7 +175,7 @@ CONFIG_TRAD_SIGNALS=y
CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
......@@ -271,6 +272,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -544,6 +546,8 @@ CONFIG_ZISOFS_FS=y
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
......@@ -635,6 +639,7 @@ CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -670,6 +675,7 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/workpad_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -54,7 +55,6 @@ CONFIG_KMOD=y
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
CONFIG_IBM_WORKPAD=y
# CONFIG_NEC_EAGLE is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_VICTOR_MPC30X is not set
......@@ -143,6 +143,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -178,6 +179,7 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
......@@ -277,6 +279,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,5 +610,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/configs/xxs1500_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -147,6 +148,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
......@@ -273,6 +275,7 @@ CONFIG_XFRM=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -607,6 +610,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -661,6 +665,7 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
#
# Library routines
#
CONFIG_CRC16=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
......
arch/mips/configs/yosemite_defconfig
View file @ c26082dd
......@@ -28,6 +28,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -137,6 +138,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -161,7 +163,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_LBD is not set
......@@ -232,6 +234,7 @@ CONFIG_IP_PNP_BOOTP=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
......@@ -517,5 +520,6 @@ CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/mips/defconfig
View file @ c26082dd
......@@ -29,6 +29,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
......@@ -148,6 +149,7 @@ CONFIG_BINFMT_IRIX=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
......@@ -362,6 +364,8 @@ CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_COMPAT_IPFWADM=m
CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_MATCH_REALM=m
#
# IPv6: Netfilter Configuration
......@@ -438,8 +442,11 @@ CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
#
......@@ -696,6 +703,8 @@ CONFIG_UDF_FS=m
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
......@@ -767,7 +776,6 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
......@@ -801,6 +809,7 @@ CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
......@@ -855,6 +864,7 @@ CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
CONFIG_CRC16=m
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
......
arch/mips/kernel/Makefile
View file @ c26082dd
......@@ -38,7 +38,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_I8259) += i8259.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
obj-$(CONFIG_MIPS_MV64340) += irq-mv6434x.o
obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o
obj-$(CONFIG_MIPS32) += scall32-o32.o
obj-$(CONFIG_MIPS64) += scall64-64.o
......
arch/mips/kernel/irq-mv6434x.c
View file @ c26082dd
......@@ -44,7 +44,7 @@ static inline void mask_mv64340_irq(unsigned int irq)
MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
} else {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
value &= ~(1 << (irq - (irq_base - 32)));
value &= ~(1 << (irq - irq_base - 32));
MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
}
}
......@@ -60,7 +60,7 @@ static inline void unmask_mv64340_irq(unsigned int irq)
MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
} else {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
value |= 1 << (irq - (irq_base - 32));
value |= 1 << (irq - irq_base - 32);
MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
}
}
......
arch/mips/kernel/traps.c
View file @ c26082dd
......@@ -9,7 +9,7 @@
* Copyright (C) 1999 Silicon Graphics, Inc.
* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000, 01 MIPS Technologies, Inc.
* Copyright (C) 2002, 2003 Maciej W. Rozycki
* Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
*/
#include <linux/config.h>
#include <linux/init.h>
......@@ -23,6 +23,7 @@
#include <asm/bootinfo.h>
#include <asm/branch.h>
#include <asm/break.h>
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/module.h>
......@@ -541,9 +542,12 @@ asmlinkage void do_bp(struct pt_regs *regs)
/*
* There is the ancient bug in the MIPS assemblers that the break
* code starts left to bit 16 instead to bit 6 in the opcode.
* Gas is bug-compatible ...
* Gas is bug-compatible, but not always, grrr...
* We handle both cases with a simple heuristics. --macro
*/
bcode = ((opcode >> 16) & ((1 << 20) - 1));
bcode = ((opcode >> 6) & ((1 << 20) - 1));
if (bcode < (1 << 10))
bcode <<= 10;
/*
* (A short test says that IRIX 5.3 sends SIGTRAP for all break
......@@ -552,9 +556,9 @@ asmlinkage void do_bp(struct pt_regs *regs)
* But should we continue the brokenness??? --macro
*/
switch (bcode) {
case 6:
case 7:
if (bcode == 7)
case BRK_OVERFLOW << 10:
case BRK_DIVZERO << 10:
if (bcode == (BRK_DIVZERO << 10))
info.si_code = FPE_INTDIV;
else
info.si_code = FPE_INTOVF;
......@@ -580,7 +584,7 @@ asmlinkage void do_tr(struct pt_regs *regs)
/* Immediate versions don't provide a code. */
if (!(opcode & OPCODE))
tcode = ((opcode >> 6) & ((1 << 20) - 1));
tcode = ((opcode >> 6) & ((1 << 10) - 1));
/*
* (A short test says that IRIX 5.3 sends SIGTRAP for all trap
......@@ -589,9 +593,9 @@ asmlinkage void do_tr(struct pt_regs *regs)
* But should we continue the brokenness??? --macro
*/
switch (tcode) {
case 6:
case 7:
if (tcode == 7)
case BRK_OVERFLOW:
case BRK_DIVZERO:
if (tcode == BRK_DIVZERO)
info.si_code = FPE_INTDIV;
else
info.si_code = FPE_INTOVF;
......
arch/mips/mm/sc-rm7k.c
View file @ c26082dd
......@@ -147,55 +147,47 @@ static void rm7k_sc_disable(void)
clear_c0_config(1<<3); /* CONF_SE */
}
static inline int __init rm7k_sc_probe(void)
struct bcache_ops rm7k_sc_ops = {
.bc_enable = rm7k_sc_enable,
.bc_disable = rm7k_sc_disable,
.bc_wback_inv = rm7k_sc_wback_inv,
.bc_inv = rm7k_sc_inv
};
void __init rm7k_sc_init(void)
{
unsigned int config = read_c0_config();
if ((config >> 31) & 1)
return 0;
if ((config >> 31) & 1) /* Bit 31 set -> no S-Cache */
return;
printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
(scache_size >> 10), sc_lsize);
if ((config >> 3) & 1) /* CONF_SE */
return 1;
if (!((config >> 3) & 1)) /* CONF_SE */
rm7k_sc_enable();
/*
* While we're at it let's deal with the tertiary cache.
*/
if ((config >> 17) & 1)
return 1;
/*
* We can't enable the L3 cache yet. There may be board-specific
* magic necessary to turn it on, and blindly asking the CPU to
* start using it would may give cache errors.
*
* Also, board-specific knowledge may allow us to use the
* CACHE Flash_Invalidate_T instruction if the tag RAM supports
* it, and may specify the size of the L3 cache so we don't have
* to probe it.
*/
printk(KERN_INFO "Tertiary cache present, %s enabled\n",
config&(1<<12) ? "already" : "not (yet)");
if ((config >> 12) & 1)
rm7k_tcache_enabled = 1;
return 1;
}
struct bcache_ops rm7k_sc_ops = {
.bc_enable = rm7k_sc_enable,
.bc_disable = rm7k_sc_disable,
.bc_wback_inv = rm7k_sc_wback_inv,
.bc_inv = rm7k_sc_inv
};
void __init rm7k_sc_init(void)
{
if (rm7k_sc_probe()) {
rm7k_sc_enable();
bcops = &rm7k_sc_ops;
if (!((config >> 17) & 1)) {
/*
* We can't enable the L3 cache yet. There may be board-specific
* magic necessary to turn it on, and blindly asking the CPU to
* start using it would may give cache errors.
*
* Also, board-specific knowledge may allow us to use the
* CACHE Flash_Invalidate_T instruction if the tag RAM supports
* it, and may specify the size of the L3 cache so we don't have
* to probe it.
*/
printk(KERN_INFO "Tertiary cache present, %s enabled\n",
config&(1<<12) ? "already" : "not (yet)");
if ((config >> 12) & 1)
rm7k_tcache_enabled = 1;
}
bcops = &rm7k_sc_ops;
}
arch/mips/momentum/jaguar_atx/prom.c
View file @ c26082dd
......@@ -33,7 +33,6 @@ extern void ja_setup_console(void);
struct callvectors *debug_vectors;
extern unsigned long mv64340_base;
extern unsigned long cpu_clock;
const char *get_system_type(void)
......@@ -185,13 +184,13 @@ void __init prom_init(void)
break;
if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
mv64340_base = simple_strtol(ptr + strlen("gtbase="),
marvell_base = simple_strtol(ptr + strlen("gtbase="),
NULL, 16);
if ((mv64340_base & 0xffffffff00000000) == 0)
mv64340_base |= 0xffffffff00000000;
if ((marvell_base & 0xffffffff00000000) == 0)
marvell_base |= 0xffffffff00000000;
printk("mv64340_base set to 0x%016lx\n", mv64340_base);
printk("marvell_base set to 0x%016lx\n", marvell_base);
}
if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
......@@ -218,7 +217,7 @@ void __init prom_init(void)
while (*env) {
if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
mv64340_base = simple_strtol(*env + strlen("gtbase="),
marvell_base = simple_strtol(*env + strlen("gtbase="),
NULL, 16);
}
if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
......
arch/mips/momentum/jaguar_atx/setup.c
View file @ c26082dd
......@@ -46,6 +46,7 @@
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/swap.h>
#include <linux/ioport.h>
......@@ -119,19 +120,21 @@ static __init void wire_stupidity_into_tlb(void)
// add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000),
// 0xfe000000UL, PM_16M);
mv64340_base = 0xf4000000;
marvell_base = 0xf4000000;
//mv64340_sram_base = 0xfe000000; /* Currently unused */
#endif
}
unsigned long mv64340_base = 0xf4000000L;
unsigned long marvell_base = 0xf4000000L;
unsigned long ja_fpga_base = JAGUAR_ATX_CS0_ADDR;
unsigned long uart_base = 0xfd000000L;
static unsigned char *rtc_base = (unsigned char*) 0xfc800000L;
EXPORT_SYMBOL(marvell_base);
static __init int per_cpu_mappings(void)
{
mv64340_base = (unsigned long) ioremap(0xf4000000, 0x10000);
marvell_base = (unsigned long) ioremap(0xf4000000, 0x10000);
ja_fpga_base = (unsigned long) ioremap(JAGUAR_ATX_CS0_ADDR, 0x1000);
uart_base = (unsigned long) ioremap(0xfd000000UL, 0x1000);
rtc_base = ioremap(0xfc000000UL, 0x8000);
......@@ -233,12 +236,14 @@ static struct resource mv_pci_mem0_resource = {
.flags = IORESOURCE_MEM
};
extern struct pci_ops mv64340_bus0_pci_ops;
static struct pci_controller mv_bus0_controller = {
.pci_ops = &mv64340_bus0_pci_ops,
.mem_resource = &mv_pci_mem0_resource,
.io_resource = &mv_pci_io_mem0_resource,
static struct mv_pci_controller mv_bus0_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &mv_pci_mem0_resource,
.io_resource = &mv_pci_io_mem0_resource,
},
.config_addr = MV64340_PCI_0_CONFIG_ADDR,
.config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG,
};
static uint32_t mv_io_base, mv_io_size;
......@@ -253,16 +258,16 @@ static void ja_pci0_init(void)
mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16;
mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16;
mv_pci_io_mem0_resource.start = 0;
mv_pci_io_mem0_resource.end = io_size - 1;
mv_pci_mem0_resource.start = mem0_base;
mv_pci_mem0_resource.end = mem0_base + mem0_size - 1;
mv_bus0_controller.mem_offset = mem0_base;
mv_bus0_controller.io_offset = 0;
mv_pci_io_mem0_resource.start = 0;
mv_pci_io_mem0_resource.end = io_size - 1;
mv_pci_mem0_resource.start = mem0_base;
mv_pci_mem0_resource.end = mem0_base + mem0_size - 1;
mv_bus0_controller.pcic.mem_offset = mem0_base;
mv_bus0_controller.pcic.io_offset = 0;
ioport_resource.end = io_size - 1;
register_pci_controller(&mv_bus0_controller);
register_pci_controller(&mv_bus0_controller.pcic);
mv_io_base = io_base;
mv_io_size = io_size;
......@@ -278,12 +283,14 @@ static struct resource mv_pci_mem1_resource = {
.flags = IORESOURCE_MEM
};
extern struct pci_ops mv64340_bus1_pci_ops;
static struct pci_controller mv_bus1_controller = {
.pci_ops = &mv64340_bus1_pci_ops,
.mem_resource = &mv_pci_mem1_resource,
.io_resource = &mv_pci_io_mem1_resource,
static struct mv_pci_controller mv_bus1_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &mv_pci_mem1_resource,
.io_resource = &mv_pci_io_mem1_resource,
},
.config_addr = MV64340_PCI_1_CONFIG_ADDR,
.config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG,
};
static __init void ja_pci1_init(void)
......@@ -301,16 +308,16 @@ static __init void ja_pci1_init(void)
* the first. A gap is no problem but would waste address space for
* remapping the port space.
*/
mv_pci_io_mem1_resource.start = mv_io_size;
mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1;
mv_pci_mem1_resource.start = mem0_base;
mv_pci_mem1_resource.end = mem0_base + mem0_size - 1;
mv_bus1_controller.mem_offset = mem0_base;
mv_bus1_controller.io_offset = 0;
mv_pci_io_mem1_resource.start = mv_io_size;
mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1;
mv_pci_mem1_resource.start = mem0_base;
mv_pci_mem1_resource.end = mem0_base + mem0_size - 1;
mv_bus1_controller.pcic.mem_offset = mem0_base;
mv_bus1_controller.pcic.io_offset = 0;
ioport_resource.end = io_base + io_size -mv_io_base - 1;
register_pci_controller(&mv_bus1_controller);
register_pci_controller(&mv_bus1_controller.pcic);
mv_io_size = io_base + io_size - mv_io_base;
}
......
arch/mips/momentum/ocelot_c/prom.c
View file @ c26082dd
......@@ -29,7 +29,7 @@
struct callvectors* debug_vectors;
extern unsigned long mv64340_base;
extern unsigned long marvell_base;
extern unsigned long cpu_clock;
#ifdef CONFIG_MV64340_ETH
......@@ -180,13 +180,13 @@ void __init prom_init(void)
break;
if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
mv64340_base = simple_strtol(ptr + strlen("gtbase="),
marvell_base = simple_strtol(ptr + strlen("gtbase="),
NULL, 16);
if ((mv64340_base & 0xffffffff00000000) == 0)
mv64340_base |= 0xffffffff00000000;
if ((marvell_base & 0xffffffff00000000) == 0)
marvell_base |= 0xffffffff00000000;
printk("mv64340_base set to 0x%016lx\n", mv64340_base);
printk("marvell_base set to 0x%016lx\n", marvell_base);
}
if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
......@@ -213,7 +213,7 @@ void __init prom_init(void)
while (*env) {
if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
mv64340_base = simple_strtol(*env + strlen("gtbase="),
marvell_base = simple_strtol(*env + strlen("gtbase="),
NULL, 16);
}
if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
......
arch/mips/momentum/ocelot_c/setup.c
View file @ c26082dd
......@@ -67,7 +67,7 @@
#include <asm/mv64340.h>
#include "ocelot_c_fpga.h"
unsigned long mv64340_base;
unsigned long marvell_base;
extern unsigned long mv64340_sram_base;
unsigned long cpu_clock;
......@@ -117,7 +117,7 @@ void PMON_v2_setup(void)
/* m-sys and internal SRAM */
add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
mv64340_base = 0xfffffffff4000000;
marvell_base = 0xfffffffff4000000;
mv64340_sram_base = 0xfffffffffe000000;
#else
/* marvell and extra space */
......@@ -127,7 +127,7 @@ void PMON_v2_setup(void)
/* m-sys and internal SRAM */
add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
mv64340_base = 0xf4000000;
marvell_base = 0xf4000000;
mv64340_sram_base = 0xfe000000;
#endif
}
......
arch/mips/momentum/ocelot_g/gt-irq.c
View file @ c26082dd
......@@ -114,10 +114,10 @@ static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs)
int handled;
/* get the low interrupt cause register */
irq_src = GT_READ(LOW_INTERRUPT_CAUSE_REGISTER);
irq_src = MV_READ(LOW_INTERRUPT_CAUSE_REGISTER);
/* get the mask register for this pin */
irq_src_mask = GT_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW);
irq_src_mask = MV_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW);
/* mask off only the interrupts we're interested in */
irq_src = irq_src & irq_src_mask;
......@@ -130,7 +130,7 @@ static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs)
irq_src &= ~0x00000100;
/* Clear any pending cause bits */
GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
/* handle the timer call */
do_timer(regs);
......@@ -160,10 +160,10 @@ void gt64240_time_init(void)
static struct irqaction timer;
/* Stop the timer -- we'll use timer #0 */
GT_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x0);
MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x0);
/* Load timer value for 100 Hz */
GT_WRITE(TIMER_COUNTER0, bus_clock / 100);
MV_WRITE(TIMER_COUNTER0, bus_clock / 100);
/*
* Create the IRQ structure entry for the timer. Since we're too early
......@@ -181,16 +181,16 @@ void gt64240_time_init(void)
enable_irq(6);
/* Clear any pending cause bits */
GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
/* Enable the interrupt for timer 0 */
GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_MASK, 0x1);
MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_MASK, 0x1);
/* Enable the timer interrupt for GT-64240 pin P0_INT# */
GT_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0x100);
MV_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0x100);
/* Configure and start the timer */
GT_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x3);
MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x3);
}
void gt64240_irq_init(void)
......
arch/mips/momentum/ocelot_g/prom.c
View file @ c26082dd
......@@ -26,7 +26,7 @@
struct callvectors* debug_vectors;
extern unsigned long gt64240_base;
extern unsigned long marvell_base;
extern unsigned long bus_clock;
#ifdef CONFIG_GALILLEO_GT64240_ETH
......@@ -69,7 +69,7 @@ void __init prom_init(void)
while (*env) {
if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
gt64240_base = simple_strtol(*env + strlen("gtbase="),
marvell_base = simple_strtol(*env + strlen("gtbase="),
NULL, 16);
}
if (strncmp("busclock", *env, strlen("busclock")) == 0) {
......
arch/mips/momentum/ocelot_g/setup.c
View file @ c26082dd
......@@ -67,7 +67,7 @@
extern unsigned char prom_mac_addr_base[6];
#endif
unsigned long gt64240_base;
unsigned long marvell_base;
/* These functions are used for rebooting or halting the machine*/
extern void momenco_ocelot_restart(char *command);
......@@ -117,7 +117,7 @@ void PMON_v2_setup(void)
add_temporary_entry(ENTRYLO(0xfc800000), ENTRYLO(0xfc810000),
0xfc800000, PM_64K);
gt64240_base = 0xf4000000;
marvell_base = 0xf4000000;
}
extern int rm7k_tcache_enabled;
......@@ -133,7 +133,7 @@ static void __init setup_l3cache(unsigned long size)
printk("Enabling L3 cache...");
/* Enable the L3 cache in the GT64120A's CPU Configuration register */
GT_WRITE(0, GT_READ(0) | (1<<14));
MV_WRITE(0, MV_READ(0) | (1<<14));
/* Enable the L3 cache in the CPU */
set_c0_config(1<<12 /* CONF_TE */);
......@@ -239,7 +239,7 @@ static int __init momenco_ocelot_g_setup(void)
}
/* FIXME: Fix up the DiskOnChip mapping */
GT_WRITE(0x468, 0xfef73);
MV_WRITE(0x468, 0xfef73);
return 0;
}
......
arch/mips/pci/Makefile
View file @ c26082dd
......@@ -12,7 +12,7 @@ obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
obj-$(CONFIG_MIPS_GT96100) += ops-gt96100.o
obj-$(CONFIG_MIPS_MV64340) += ops-mv64340.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o
......@@ -38,8 +38,7 @@ obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o
obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o
obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o ops-gt64240.o pci-ocelot-g.o
obj-$(CONFIG_NEC_EAGLE) += fixup-eagle.o ops-vrc4173.o
obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o pci-ocelot-g.o
obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
pci-yosemite.o
obj-$(CONFIG_SGI_IP27) += pci-ip27.o
......
arch/mips/pci/fixup-eagle.c deleted 100644 → 0
View file @ 30f2e50f
/*
* arch/mips/vr41xx/nec-eagle/pci_fixup.c
*
* The NEC Eagle/Hawk Board specific PCI fixups.
*
* Author: Yoichi Yuasa <you@mvista.com, or source@mvista.com>
*
* 2001-2002,2004 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/vr41xx/eagle.h>
#include <asm/vr41xx/vrc4173.h>
/*
* Shortcuts
*/
#define INTA CP_INTA_IRQ
#define INTB CP_INTB_IRQ
#define INTC CP_INTC_IRQ
#define INTD CP_INTD_IRQ
#define PCMCIA1 VRC4173_PCMCIA1_IRQ
#define PCMCIA2 VRC4173_PCMCIA2_IRQ
#define LAN LANINTA_IRQ
#define SLOT PCISLOT_IRQ
static char irq_tab_eagle[][5] __initdata = {
[ 8] = { 0, INTA, INTB, INTC, INTD },
[ 9] = { 0, INTD, INTA, INTB, INTC },
[10] = { 0, INTC, INTD, INTA, INTB },
[12] = { 0, PCMCIA1, 0, 0, 0 },
[13] = { 0, PCMCIA2, 0, 0, 0 },
[28] = { 0, LAN, 0, 0, 0 },
[29] = { 0, SLOT, INTB, INTC, INTD },
};
/*
* This is a multifunction device.
*/
static char irq_func_tab[] __initdata = {
VRC4173_CASCADE_IRQ,
VRC4173_AC97_IRQ,
VRC4173_USB_IRQ
};
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
if (slot == 30)
return irq_func_tab[PCI_FUNC(dev->devfn)];
return irq_tab_eagle[slot][pin];
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ .pass = 0, },
};
arch/mips/pci/ops-gt64240.c deleted 100644 → 0
View file @ 30f2e50f
/*
* Copyright 2002 Momentum Computer
* Author: Matthew Dharm <mdharm@momenco.com>
* Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/gt64240.h>
#define MASTER_ABORT_BIT 0x100
/*
* galileo_pcibios_(read/write)_config_(dword/word/byte) -
*
* reads/write a dword/word/byte register from the configuration space
* of a device.
*
* Note that bus 0 and bus 1 are local, and we assume all other busses are
* bridged from bus 1. This is a safe assumption, since any other
* configuration will require major modifications to the CP7000G
*
* Inputs :
* bus - bus number
* dev - device number
* offset - register offset in the configuration space
* val - value to be written / read
*
* Outputs :
* PCIBIOS_SUCCESSFUL when operation was succesfull
* PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
* PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
*/
static int gt_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int size, u32 *val, u32 address_reg, u32 data_reg)
{
uint32_t address;
int dev, busno;
busno = bus->number;
dev = PCI_SLOT(devfn);
/* verify the range */
if (dev == 31)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
/* start the configuration cycle */
GT_WRITE(address_reg, address);
switch (size) {
case 1:
GT_READ_8(data_reg + (offset & 0x3), val);
break;
case 2:
GT_READ_16(data_reg + (offset & 0x3), val);
break;
case 4:
*val = GT_READ(data_reg);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int gt_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
int size, u32 val, u32 address_reg, u32 data_reg)
{
unsigned int address;
int dev, busno;
busno = bus->number;
dev = PCI_SLOT(devfn);
/* verify the range */
if (dev == 31)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
/* start the configuration cycle */
GT_WRITE(address_reg, address);
switch (size) {
case 1:
GT_WRITE_8(data_reg + (offset & 0x3), val);
break;
case 2:
GT_WRITE_16(data_reg + (offset & 0x3), val);
break;
case 4:
GT_WRITE(data_reg, val);
break;
}
return PCIBIOS_SUCCESSFUL;
}
#define BUILD_PCI_OPS(host) \
\
static int gt_bus ## host ## _read_config(struct pci_bus *bus, \
unsigned int devfn, int reg, int size, u32 * val) \
{ \
return gt_read_config(bus, devfn, reg, size, val, \
PCI_ ## host ## CONFIGURATION_ADDRESS, \
PCI_ ## host ## CONFIGURATION_DATA_VIRTUAL_REGISTER); \
} \
\
static int gt_bus ## host ## _write_config(struct pci_bus *bus, \
unsigned int devfn, int reg, int size, u32 val) \
{ \
return gt_write_config(bus, devfn, reg, size, val, \
PCI_ ## host ## CONFIGURATION_ADDRESS, \
PCI_ ## host ## CONFIGURATION_DATA_VIRTUAL_REGISTER); \
} \
\
struct pci_ops gt_bus ## host ## _pci_ops = { \
.read = gt_bus ## host ## _read_config, \
.write = gt_bus ## host ## _write_config \
};
BUILD_PCI_OPS(0)
BUILD_PCI_OPS(1)
arch/mips/pci/ops-marvell.c 0 → 100644
View file @ c26082dd
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/marvell.h>
static int mv_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
struct mv_pci_controller *mvbc = bus->sysdata;
unsigned long address_reg, data_reg;
u32 address;
address_reg = mvbc->config_addr;
data_reg = mvbc->config_vreg;
/* Accessing device 31 crashes those Marvells. Since years.
Will they ever make sane controllers ... */
if (PCI_SLOT(devfn) == 31)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (bus->number << 16) | (devfn << 8) |
(where & 0xfc) | 0x80000000;
/* start the configuration cycle */
MV_WRITE(address_reg, address);
switch (size) {
case 1:
*val = MV_READ_8(data_reg + (where & 0x3));
break;
case 2:
*val = MV_READ_16(data_reg + (where & 0x3));
break;
case 4:
*val = MV_READ(data_reg);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int mv_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
struct mv_pci_controller *mvbc = bus->sysdata;
unsigned long address_reg, data_reg;
u32 address;
address_reg = mvbc->config_addr;
data_reg = mvbc->config_vreg;
/* Accessing device 31 crashes those Marvells. Since years.
Will they ever make sane controllers ... */
if (PCI_SLOT(devfn) == 31)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (bus->number << 16) | (devfn << 8) |
(where & 0xfc) | 0x80000000;
/* start the configuration cycle */
MV_WRITE(address_reg, address);
switch (size) {
case 1:
MV_WRITE_8(data_reg + (where & 0x3), val);
break;
case 2:
MV_WRITE_16(data_reg + (where & 0x3), val);
break;
case 4:
MV_WRITE(data_reg, val);
break;
}
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops mv_pci_ops = {
.read = mv_read_config,
.write = mv_write_config
};
arch/mips/pci/ops-mv64340.c deleted 100644 → 0
View file @ 30f2e50f
/*
* Copyright 2002 Momentum Computer
* Author: Matthew Dharm <mdharm@momenco.com>
*
* Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <asm/mv64340.h>
/*
* galileo_pcibios_(read/write)_config_(dword/word/byte) -
*
* reads/write a dword/word/byte register from the configuration space
* of a device.
*
* Note that bus 0 and bus 1 are local, and we assume all other busses are
* bridged from bus 1. This is a safe assumption, since any other
* configuration will require major modifications to the CP7000G
*
* Inputs :
* bus - bus number
* dev - device number
* offset - register offset in the configuration space
* val - value to be written / read
*
* Outputs :
* PCIBIOS_SUCCESSFUL when operation was succesfull
* PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
* PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
*/
static int mv64340_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
int size, u32 * val, u32 address_reg, u32 data_reg)
{
u32 address;
/* Accessing device 31 crashes the MV-64340. */
if (PCI_SLOT(devfn) > 5)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (bus->number << 16) | (devfn << 8) |
(reg & 0xfc) | 0x80000000;
/* start the configuration cycle */
MV_WRITE(address_reg, address);
switch (size) {
case 1:
*val = MV_READ_8(data_reg + (reg & 0x3));
break;
case 2:
*val = MV_READ_16(data_reg + (reg & 0x3));
break;
case 4:
*val = MV_READ(data_reg);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int mv64340_write_config(struct pci_bus *bus, unsigned int devfn,
int reg, int size, u32 val, u32 address_reg, u32 data_reg)
{
u32 address;
/* Accessing device 31 crashes the MV-64340. */
if (PCI_SLOT(devfn) > 5)
return PCIBIOS_DEVICE_NOT_FOUND;
address = (bus->number << 16) | (devfn << 8) |
(reg & 0xfc) | 0x80000000;
/* start the configuration cycle */
MV_WRITE(address_reg, address);
switch (size) {
case 1:
/* write the data */
MV_WRITE_8(data_reg + (reg & 0x3), val);
break;
case 2:
/* write the data */
MV_WRITE_16(data_reg + (reg & 0x3), val);
break;
case 4:
/* write the data */
MV_WRITE(data_reg, val);
break;
}
return PCIBIOS_SUCCESSFUL;
}
#define BUILD_PCI_OPS(host) \
\
static int mv64340_bus ## host ## _read_config(struct pci_bus *bus, \
unsigned int devfn, int reg, int size, u32 * val) \
{ \
return mv64340_read_config(bus, devfn, reg, size, val, \
MV64340_PCI_ ## host ## _CONFIG_ADDR, \
MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
} \
\
static int mv64340_bus ## host ## _write_config(struct pci_bus *bus, \
unsigned int devfn, int reg, int size, u32 val) \
{ \
return mv64340_write_config(bus, devfn, reg, size, val, \
MV64340_PCI_ ## host ## _CONFIG_ADDR, \
MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
} \
\
struct pci_ops mv64340_bus ## host ## _pci_ops = { \
.read = mv64340_bus ## host ## _read_config, \
.write = mv64340_bus ## host ## _write_config \
};
BUILD_PCI_OPS(0)
BUILD_PCI_OPS(1)
arch/mips/pci/ops-vrc4173.c deleted 100644 → 0
View file @ 30f2e50f
/*
* FILE NAME
* arch/mips/vr41xx/nec-eagle/vrc4173.c
*
* BRIEF MODULE DESCRIPTION
* Pre-setup for NEC VRC4173.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/vr41xx/eagle.h>
#include <asm/vr41xx/vrc4173.h>
#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
static inline void config_writeb(u8 reg, u8 val)
{
u32 data;
int shift;
writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
data = readl(PCI_CONFIG_DATA);
shift = (reg & 3) << 3;
data &= ~(0xff << shift);
data |= (((u32) val) << shift);
writel(data, PCI_CONFIG_DATA);
}
static inline u16 config_readw(u8 reg)
{
u32 data;
writel(((1UL << 30) | (reg & 0xfc)), PCI_CONFIG_ADDR);
data = readl(PCI_CONFIG_DATA);
return (u16) (data >> ((reg & 2) << 3));
}
static inline u32 config_readl(u8 reg)
{
writel(((1UL << 30) | (reg & 0xfc)), PCI_CONFIG_ADDR);
return readl(PCI_CONFIG_DATA);
}
static inline void config_writel(u8 reg, u32 val)
{
writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
writel(val, PCI_CONFIG_DATA);
}
void __init vrc4173_preinit(void)
{
u32 cmdsts, base;
u16 cmu_mask;
if ((config_readw(PCI_VENDOR_ID) == PCI_VENDOR_ID_NEC) &&
(config_readw(PCI_DEVICE_ID) == PCI_DEVICE_ID_NEC_VRC4173)) {
/*
* Initialized NEC VRC4173 Bus Control Unit
*/
cmdsts = config_readl(PCI_COMMAND);
config_writel(PCI_COMMAND,
cmdsts |
PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
config_writeb(PCI_LATENCY_TIMER, 0x80);
config_writel(PCI_BASE_ADDRESS_0, VR41XX_PCI_IO_START);
base = config_readl(PCI_BASE_ADDRESS_0);
base &= PCI_BASE_ADDRESS_IO_MASK;
config_writeb(0x40, 0x01);
/* CARDU1 IDSEL = AD12, CARDU2 IDSEL = AD13 */
config_writeb(0x41, 0);
cmu_mask = 0x1000;
outw(cmu_mask, base + 0x040);
cmu_mask |= 0x0800;
outw(cmu_mask, base + 0x040);
outw(0x000f, base + 0x042); /* Soft reset of CMU */
cmu_mask |= 0x05e0;
outw(cmu_mask, base + 0x040);
cmu_mask = inw(base + 0x040); /* dummy read */
outw(0x0000, base + 0x042);
}
}
arch/mips/pci/pci-ocelot-c.c
View file @ c26082dd
......@@ -27,12 +27,14 @@ static struct resource mv_pci_mem0_resource = {
.flags = IORESOURCE_MEM
};
extern struct pci_ops mv64340_bus0_pci_ops;
static struct pci_controller mv_bus0_controller = {
.pci_ops = &mv64340_bus0_pci_ops,
.mem_resource = &mv_pci_mem0_resource,
.io_resource = &mv_pci_io_mem0_resource,
static struct mv_pci_controller mv_bus0_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &mv_pci_mem0_resource,
.io_resource = &mv_pci_io_mem0_resource,
},
.config_addr = MV64340_PCI_0_CONFIG_ADDR,
.config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG,
};
static uint32_t mv_io_base, mv_io_size;
......@@ -47,16 +49,16 @@ static void mv64340_pci0_init(void)
mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16;
mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16;
mv_pci_io_mem0_resource.start = 0;
mv_pci_io_mem0_resource.end = io_size - 1;
mv_pci_mem0_resource.start = mem0_base;
mv_pci_mem0_resource.end = mem0_base + mem0_size - 1;
mv_bus0_controller.mem_offset = mem0_base;
mv_bus0_controller.io_offset = 0;
mv_pci_io_mem0_resource.start = 0;
mv_pci_io_mem0_resource.end = io_size - 1;
mv_pci_mem0_resource.start = mem0_base;
mv_pci_mem0_resource.end = mem0_base + mem0_size - 1;
mv_bus0_controller.pcic.mem_offset = mem0_base;
mv_bus0_controller.pcic.io_offset = 0;
ioport_resource.end = io_size - 1;
register_pci_controller(&mv_bus0_controller);
register_pci_controller(&mv_bus0_controller.pcic);
mv_io_base = io_base;
mv_io_size = io_size;
......@@ -72,12 +74,14 @@ static struct resource mv_pci_mem1_resource = {
.flags = IORESOURCE_MEM
};
extern struct pci_ops mv64340_bus1_pci_ops;
static struct pci_controller mv_bus1_controller = {
.pci_ops = &mv64340_bus1_pci_ops,
.mem_resource = &mv_pci_mem1_resource,
.io_resource = &mv_pci_io_mem1_resource,
static struct mv_pci_controller mv_bus1_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &mv_pci_mem1_resource,
.io_resource = &mv_pci_io_mem1_resource,
},
.config_addr = MV64340_PCI_1_CONFIG_ADDR,
.config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG,
};
static __init void mv64340_pci1_init(void)
......@@ -95,16 +99,16 @@ static __init void mv64340_pci1_init(void)
* the first. A gap is no problem but would waste address space for
* remapping the port space.
*/
mv_pci_io_mem1_resource.start = mv_io_size;
mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1;
mv_pci_mem1_resource.start = mem0_base;
mv_pci_mem1_resource.end = mem0_base + mem0_size - 1;
mv_bus1_controller.mem_offset = mem0_base;
mv_bus1_controller.io_offset = 0;
mv_pci_io_mem1_resource.start = mv_io_size;
mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1;
mv_pci_mem1_resource.start = mem0_base;
mv_pci_mem1_resource.end = mem0_base + mem0_size - 1;
mv_bus1_controller.pcic.mem_offset = mem0_base;
mv_bus1_controller.pcic.io_offset = 0;
ioport_resource.end = io_base + io_size -mv_io_base - 1;
register_pci_controller(&mv_bus1_controller);
register_pci_controller(&mv_bus1_controller.pcic);
mv_io_size = io_base + io_size - mv_io_base;
}
......
arch/mips/pci/pci-ocelot-g.c
View file @ c26082dd
......@@ -39,12 +39,16 @@ static struct resource gt_pci_io_mem0_resource = {
.flags = IORESOURCE_IO
};
static struct pci_controller gt_bus0_controller = {
.pci_ops = &gt_bus0_pci_ops,
.mem_resource = &gt_pci_mem0_resource,
.mem_offset = 0xc0000000UL,
.io_resource = &gt_pci_io_mem0_resource,
.io_offset = 0x00000000UL
static struct mv_pci_controller gt_bus0_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &gt_pci_mem0_resource,
.mem_offset = 0xc0000000UL,
.io_resource = &gt_pci_io_mem0_resource,
.io_offset = 0x00000000UL
},
.config_addr = PCI_0CONFIGURATION_ADDRESS,
.config_vreg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER,
};
static struct resource gt_pci_mem1_resource = {
......@@ -61,12 +65,16 @@ static struct resource gt_pci_io_mem1_resource = {
.flags = IORESOURCE_IO
};
static struct pci_controller gt_bus1_controller = {
.pci_ops = &gt_bus1_pci_ops,
.mem_resource = &gt_pci_mem1_resource,
.mem_offset = 0xd0000000UL,
.io_resource = &gt_pci_io_mem1_resource,
.io_offset = 0x10000000UL
static struct mv_pci_controller gt_bus1_controller = {
.pcic = {
.pci_ops = &mv_pci_ops,
.mem_resource = &gt_pci_mem1_resource,
.mem_offset = 0xd0000000UL,
.io_resource = &gt_pci_io_mem1_resource,
.io_offset = 0x10000000UL
},
.config_addr = PCI_1CONFIGURATION_ADDRESS,
.config_vreg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER,
};
static __init int __init ocelot_g_pci_init(void)
......@@ -81,8 +89,8 @@ static __init int __init ocelot_g_pci_init(void)
set_io_port_base(io_v_base);
}
register_pci_controller(&gt_bus0_controller);
register_pci_controller(&gt_bus1_controller);
register_pci_controller(&gt_bus0_controller.pcic);
register_pci_controller(&gt_bus1_controller.pcic);
return 0;
}
......
arch/mips/sibyte/sb1250/irq_handler.S
View file @ c26082dd
......@@ -123,7 +123,7 @@
* check the 1250 interrupt registers to figure out what to do
* Need to detect which CPU we're on, now that smp_affinity is supported.
*/
la v0, KSEG1 + A_IMR_CPU0_BASE
PTR_LA v0, KSEG1 + A_IMR_CPU0_BASE
#ifdef CONFIG_SMP
lw t1, TI_CPU($28)
sll t1, IMR_REGISTER_SPACING_SHIFT
......
arch/mips/vr41xx/nec-eagle/Makefile deleted 100644 → 0
View file @ 30f2e50f
#
# Makefile for the NEC Eagle/Hawk specific parts of the kernel
#
# Author: Yoichi Yuasa
# yyuasa@mvista.com or source@mvista.com
#
# Copyright 2001,2002 MontaVista Software Inc.
#
obj-y += irq.o setup.o
arch/mips/vr41xx/nec-eagle/irq.c deleted 100644 → 0
View file @ 30f2e50f
/*
* irq.c, Interrupt routines for the NEC Eagle/Hawk board.
*
* Copyright (C) 2002 MontaVista Software, Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
* Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC Eagle is supported.
* - Added support for NEC Hawk.
*
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
* - Changed from board_irq_init to driver module.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/vr41xx/eagle.h>
MODULE_DESCRIPTION("IRQ module driver for NEC Eagle/Hawk");
MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>");
MODULE_LICENSE("GPL");
static void enable_pciint_irq(unsigned int irq)
{
uint8_t val;
val = readb(NEC_EAGLE_PCIINTMSKREG);
val |= (uint8_t)1 << (irq - PCIINT_IRQ_BASE);
writeb(val, NEC_EAGLE_PCIINTMSKREG);
}
static void disable_pciint_irq(unsigned int irq)
{
uint8_t val;
val = readb(NEC_EAGLE_PCIINTMSKREG);
val &= ~((uint8_t)1 << (irq - PCIINT_IRQ_BASE));
writeb(val, NEC_EAGLE_PCIINTMSKREG);
}
static unsigned int startup_pciint_irq(unsigned int irq)
{
enable_pciint_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_pciint_irq disable_pciint_irq
#define ack_pciint_irq disable_pciint_irq
static void end_pciint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_pciint_irq(irq);
}
static struct hw_interrupt_type pciint_irq_type = {
.typename = "PCIINT",
.startup = startup_pciint_irq,
.shutdown = shutdown_pciint_irq,
.enable = enable_pciint_irq,
.disable = disable_pciint_irq,
.ack = ack_pciint_irq,
.end = end_pciint_irq,
};
static void enable_sdbint_irq(unsigned int irq)
{
uint8_t val;
val = readb(NEC_EAGLE_SDBINTMSK);
val |= (uint8_t)1 << (irq - SDBINT_IRQ_BASE);
writeb(val, NEC_EAGLE_SDBINTMSK);
}
static void disable_sdbint_irq(unsigned int irq)
{
uint8_t val;
val = readb(NEC_EAGLE_SDBINTMSK);
val &= ~((uint8_t)1 << (irq - SDBINT_IRQ_BASE));
writeb(val, NEC_EAGLE_SDBINTMSK);
}
static unsigned int startup_sdbint_irq(unsigned int irq)
{
enable_sdbint_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_sdbint_irq disable_sdbint_irq
#define ack_sdbint_irq disable_sdbint_irq
static void end_sdbint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_sdbint_irq(irq);
}
static struct hw_interrupt_type sdbint_irq_type = {
.typename = "SDBINT",
.startup = startup_sdbint_irq,
.shutdown = shutdown_sdbint_irq,
.enable = enable_sdbint_irq,
.disable = disable_sdbint_irq,
.ack = ack_sdbint_irq,
.end = end_sdbint_irq,
};
static int eagle_get_irq_number(int irq)
{
uint8_t sdbint, pciint;
int i;
sdbint = readb(NEC_EAGLE_SDBINT);
sdbint &= (NEC_EAGLE_SDBINT_DEG | NEC_EAGLE_SDBINT_ENUM |
NEC_EAGLE_SDBINT_SIO1INT | NEC_EAGLE_SDBINT_SIO2INT |
NEC_EAGLE_SDBINT_PARINT);
pciint = readb(NEC_EAGLE_PCIINTREG);
pciint &= (NEC_EAGLE_PCIINT_CP_INTA | NEC_EAGLE_PCIINT_CP_INTB |
NEC_EAGLE_PCIINT_CP_INTC | NEC_EAGLE_PCIINT_CP_INTD |
NEC_EAGLE_PCIINT_LANINT);
for (i = 1; i < 6; i++)
if (sdbint & (0x01 << i))
return SDBINT_IRQ_BASE + i;
for (i = 0; i < 5; i++)
if (pciint & (0x01 << i))
return PCIINT_IRQ_BASE + i;
return -EINVAL;
}
static int __devinit eagle_irq_init(void)
{
int i, retval;
writeb(0, NEC_EAGLE_SDBINTMSK);
writeb(0, NEC_EAGLE_PCIINTMSKREG);
vr41xx_set_irq_trigger(PCISLOT_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
vr41xx_set_irq_level(PCISLOT_PIN, LEVEL_HIGH);
vr41xx_set_irq_trigger(FPGA_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
vr41xx_set_irq_level(FPGA_PIN, LEVEL_HIGH);
vr41xx_set_irq_trigger(DCD_PIN, TRIGGER_EDGE, SIGNAL_HOLD);
vr41xx_set_irq_level(DCD_PIN, LEVEL_LOW);
for (i = SDBINT_IRQ_BASE; i <= SDBINT_IRQ_LAST; i++)
irq_desc[i].handler = &sdbint_irq_type;
for (i = PCIINT_IRQ_BASE; i <= PCIINT_IRQ_LAST; i++)
irq_desc[i].handler = &pciint_irq_type;
retval = vr41xx_cascade_irq(FPGA_CASCADE_IRQ, eagle_get_irq_number);
if (retval != 0)
printk(KERN_ERR "eagle: Cannot cascade IRQ %d\n", FPGA_CASCADE_IRQ);
return retval;
}
static void __devexit eagle_irq_exit(void)
{
free_irq(FPGA_CASCADE_IRQ, NULL);
}
module_init(eagle_irq_init);
module_exit(eagle_irq_exit);
arch/mips/vr41xx/nec-eagle/setup.c deleted 100644 → 0
View file @ 30f2e50f
/*
* arch/mips/vr41xx/nec-eagle/setup.c
*
* Setup for the NEC Eagle/Hawk board.
*
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
*
* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/config.h>
#include <linux/ioport.h>
#include <asm/io.h>
#include <asm/pci_channel.h>
#include <asm/vr41xx/eagle.h>
#ifdef CONFIG_PCI
extern void vrc4173_preinit(void);
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
VR41XX_PCI_IO_START,
VR41XX_PCI_IO_END,
IORESOURCE_IO
};
static struct resource vr41xx_pci_mem_resource = {
"PCI memory space",
VR41XX_PCI_MEM_START,
VR41XX_PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_controller vr41xx_controller = {
.pci_ops = &vr41xx_pci_ops,
.io_resource = &vr41xx_pci_io_resource,
.mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
VR41XX_PCI_MEM1_BASE,
VR41XX_PCI_MEM1_MASK,
IO_MEM1_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
VR41XX_PCI_MEM2_BASE,
VR41XX_PCI_MEM2_MASK,
IO_MEM2_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
VR41XX_PCI_IO_BASE,
VR41XX_PCI_IO_MASK,
IO_PORT_RESOURCE_START
};
static struct vr41xx_pci_address_map pci_address_map = {
&vr41xx_pci_mem1,
&vr41xx_pci_mem2,
&vr41xx_pci_io
};
#endif
const char *get_system_type(void)
{
return "NEC SDB-VR4122/VR4131(Eagle/Hawk)";
}
static int nec_eagle_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
#ifdef CONFIG_SERIAL_8250
vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE);
vr41xx_siu_init();
vr41xx_dsiu_init();
#endif
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
vrc4173_preinit();
#endif
return 0;
}
early_initcall(nec_eagle_setup);
include/asm-mips/gt64240.h
View file @ c26082dd
......@@ -10,7 +10,7 @@
#define __ASM_MIPS_MV64240_H
#include <asm/addrspace.h>
#include <asm/byteorder.h>
#include <asm/marvell.h>
/*
* CPU Control Registers
......@@ -1232,33 +1232,4 @@
#define MPSC1_CAUSE 0xb80c
#define MPSC1_MASK 0xb88c
extern unsigned long gt64240_base;
#define GT64240_BASE (gt64240_base)
/*
* Because of an error/peculiarity in the Galileo chip, we need to swap the
* bytes when running bigendian.
*/
#define __GT_READ(ofs) \
(*(volatile u32 *)(GT64240_BASE+(ofs)))
#define __GT_WRITE(ofs, data) \
do { *(volatile u32 *)(GT64240_BASE+(ofs)) = (data); } while (0)
#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
#define GT_READ_16(ofs, data) \
le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs)))
#define GT_WRITE_16(ofs, data) \
*(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data)
#define GT_READ_8(ofs, data) \
*(data) = *(volatile u8 *)(GT64240_BASE+(ofs))
#define GT_WRITE_8(ofs, data) \
*(volatile u8 *)(GT64240_BASE+(ofs)) = data
extern struct pci_ops gt_bus0_pci_ops;
extern struct pci_ops gt_bus1_pci_ops;
#endif /* __ASM_MIPS_MV64240_H */
include/asm-mips/marvell.h 0 → 100644
View file @ c26082dd
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2004 by Ralf Baechle
*/
#ifndef __ASM_MIPS_MARVELL_H
#define __ASM_MIPS_MARVELL_H
#include <linux/pci.h>
#include <asm/byteorder.h>
#include <asm/pci_channel.h>
extern unsigned long marvell_base;
/*
* Because of an error/peculiarity in the Galileo chip, we need to swap the
* bytes when running bigendian.
*/
#define __MV_READ(ofs) \
(*(volatile u32 *)(marvell_base+(ofs)))
#define __MV_WRITE(ofs, data) \
do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0)
#define MV_READ(ofs) le32_to_cpu(__MV_READ(ofs))
#define MV_WRITE(ofs, data) __MV_WRITE(ofs, cpu_to_le32(data))
#define MV_READ_16(ofs) \
le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs)))
#define MV_WRITE_16(ofs, data) \
*(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data)
#define MV_READ_8(ofs) \
*(volatile u8 *)(marvell_base+(ofs))
#define MV_WRITE_8(ofs, data) \
*(volatile u8 *)(marvell_base+(ofs)) = data
#define MV_SET_REG_BITS(ofs, bits) \
(*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits))
#define MV_RESET_REG_BITS(ofs, bits) \
(*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))
extern struct pci_ops mv_pci_ops;
struct mv_pci_controller {
struct pci_controller pcic;
/*
* GT-64240/MV-64340 specific, per host bus information
*/
unsigned long config_addr;
unsigned long config_vreg;
};
#endif /* __ASM_MIPS_MARVELL_H */
include/asm-mips/mv64340.h
View file @ c26082dd
......@@ -14,7 +14,7 @@
#define __ASM_MV64340_H
#include <asm/addrspace.h>
#include <asm/byteorder.h>
#include <asm/marvell.h>
/****************************************/
/* Processor Address Space */
......@@ -1034,38 +1034,6 @@
#define MV64340_SERIAL_INIT_CONTROL 0xf328
#define MV64340_SERIAL_INIT_STATUS 0xf32c
extern unsigned long mv64340_base;
#define MV64340_BASE (mv64340_base)
/*
* Because of an error/peculiarity in the Galileo chip, we need to swap the
* bytes when running bigendian.
*/
#define MV_WRITE(ofs, data) \
*(volatile u32 *)(MV64340_BASE + (ofs)) = cpu_to_le32((u32)data)
#define MV_READ(ofs) \
(le32_to_cpu(*(volatile u32 *)(MV64340_BASE + (ofs))))
#define MV_WRITE_16(ofs, data) \
*(volatile u16 *)(MV64340_BASE + (ofs)) = cpu_to_le16((u16)data)
#define MV_READ_16(ofs) \
le16_to_cpu(*(volatile u16 *)(MV64340_BASE + (ofs)))
#define MV_WRITE_8(ofs, data) \
*(volatile u8 *)(MV64340_BASE + (ofs)) = ((u16)data)
#define MV_READ_8(ofs) \
(*(volatile u8 *)(MV64340_BASE + (ofs)))
#define MV_SET_REG_BITS(ofs, bits) \
(*((volatile u32 *)(MV64340_BASE + (ofs)))) |= ((u32)cpu_to_le32(bits))
#define MV_RESET_REG_BITS(ofs, bits) \
(*((volatile u32 *)(MV64340_BASE + (ofs)))) &= ~((u32)cpu_to_le32(bits))
extern void mv64340_irq_init(unsigned int base);
extern struct pci_ops mv64340_bus0_pci_ops;
extern struct pci_ops mv64340_bus1_pci_ops;
#endif /* __ASM_MV64340_H */
include/asm-mips/pgtable-bits.h
View file @ c26082dd
......@@ -82,7 +82,7 @@
#define _CACHE_FPC (7 << 9)
#define _CACHE_UNCACHED _CACHE_UC_B
#define _CACHE_CACHABLE_NONCOHERENT _CACHE_UC_B
#define _CACHE_CACHABLE_NONCOHERENT _CACHE_WB
#else
......
include/asm-mips/vr41xx/eagle.h deleted 100644 → 0
View file @ 30f2e50f
/*
* FILE NAME
* include/asm-mips/vr41xx/eagle.h
*
* BRIEF MODULE DESCRIPTION
* Include file for NEC Eagle board.
*
* Author: MontaVista Software, Inc.
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __NEC_EAGLE_H
#define __NEC_EAGLE_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define VRC4173_PIN 1
#define PCISLOT_PIN 4
#define FPGA_PIN 5
#define DCD_PIN 15
/*
* Interrupt Number
*/
#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
#define PCISLOT_IRQ GIU_IRQ(PCISLOT_PIN)
#define FPGA_CASCADE_IRQ GIU_IRQ(FPGA_PIN)
#define DCD_IRQ GIU_IRQ(DCD_PIN)
#define SDBINT_IRQ_BASE 88
#define SDBINT_IRQ(x) (SDBINT_IRQ_BASE + (x))
/* RFU */
#define DEG_IRQ SDBINT_IRQ(1)
#define ENUM_IRQ SDBINT_IRQ(2)
#define SIO1INT_IRQ SDBINT_IRQ(3)
#define SIO2INT_IRQ SDBINT_IRQ(4)
#define PARINT_IRQ SDBINT_IRQ(5)
#define SDBINT_IRQ_LAST PARINT_IRQ
#define PCIINT_IRQ_BASE 96
#define PCIINT_IRQ(x) (PCIINT_IRQ_BASE + (x))
#define CP_INTA_IRQ PCIINT_IRQ(0)
#define CP_INTB_IRQ PCIINT_IRQ(1)
#define CP_INTC_IRQ PCIINT_IRQ(2)
#define CP_INTD_IRQ PCIINT_IRQ(3)
#define LANINTA_IRQ PCIINT_IRQ(4)
#define PCIINT_IRQ_LAST LANINTA_IRQ
/*
* On board Devices I/O Mapping
*/
#define NEC_EAGLE_SIO1RB KSEG1ADDR(0x0DFFFEC0)
#define NEC_EAGLE_SIO1TH KSEG1ADDR(0x0DFFFEC0)
#define NEC_EAGLE_SIO1IE KSEG1ADDR(0x0DFFFEC2)
#define NEC_EAGLE_SIO1IID KSEG1ADDR(0x0DFFFEC4)
#define NEC_EAGLE_SIO1FC KSEG1ADDR(0x0DFFFEC4)
#define NEC_EAGLE_SIO1LC KSEG1ADDR(0x0DFFFEC6)
#define NEC_EAGLE_SIO1MC KSEG1ADDR(0x0DFFFEC8)
#define NEC_EAGLE_SIO1LS KSEG1ADDR(0x0DFFFECA)
#define NEC_EAGLE_SIO1MS KSEG1ADDR(0x0DFFFECC)
#define NEC_EAGLE_SIO1SC KSEG1ADDR(0x0DFFFECE)
#define NEC_EAGLE_SIO2TH KSEG1ADDR(0x0DFFFED0)
#define NEC_EAGLE_SIO2IE KSEG1ADDR(0x0DFFFED2)
#define NEC_EAGLE_SIO2IID KSEG1ADDR(0x0DFFFED4)
#define NEC_EAGLE_SIO2FC KSEG1ADDR(0x0DFFFED4)
#define NEC_EAGLE_SIO2LC KSEG1ADDR(0x0DFFFED6)
#define NEC_EAGLE_SIO2MC KSEG1ADDR(0x0DFFFED8)
#define NEC_EAGLE_SIO2LS KSEG1ADDR(0x0DFFFEDA)
#define NEC_EAGLE_SIO2MS KSEG1ADDR(0x0DFFFEDC)
#define NEC_EAGLE_SIO2SC KSEG1ADDR(0x0DFFFEDE)
#define NEC_EAGLE_PIOPP_DATA KSEG1ADDR(0x0DFFFEE0)
#define NEC_EAGLE_PIOPP_STATUS KSEG1ADDR(0x0DFFFEE2)
#define NEC_EAGLE_PIOPP_CNT KSEG1ADDR(0x0DFFFEE4)
#define NEC_EAGLE_PIOPP_EPPADDR KSEG1ADDR(0x0DFFFEE6)
#define NEC_EAGLE_PIOPP_EPPDATA0 KSEG1ADDR(0x0DFFFEE8)
#define NEC_EAGLE_PIOPP_EPPDATA1 KSEG1ADDR(0x0DFFFEEA)
#define NEC_EAGLE_PIOPP_EPPDATA2 KSEG1ADDR(0x0DFFFEEC)
#define NEC_EAGLE_PIOECP_DATA KSEG1ADDR(0x0DFFFEF0)
#define NEC_EAGLE_PIOECP_CONFIG KSEG1ADDR(0x0DFFFEF2)
#define NEC_EAGLE_PIOECP_EXTCNT KSEG1ADDR(0x0DFFFEF4)
/*
* FLSHCNT Register
*/
#define NEC_EAGLE_FLSHCNT KSEG1ADDR(0x0DFFFFA0)
#define NEC_EAGLE_FLSHCNT_FRDY 0x80
#define NEC_EAGLE_FLSHCNT_VPPE 0x40
#define NEC_EAGLE_FLSHCNT_WP2 0x01
/*
* FLSHBANK Register
*/
#define NEC_EAGLE_FLSHBANK KSEG1ADDR(0x0DFFFFA4)
#define NEC_EAGLE_FLSHBANK_S_BANK2 0x40
#define NEC_EAGLE_FLSHBANK_S_BANK1 0x20
#define NEC_EAGLE_FLSHBANK_BNKQ4 0x10
#define NEC_EAGLE_FLSHBANK_BNKQ3 0x08
#define NEC_EAGLE_FLSHBANK_BNKQ2 0x04
#define NEC_EAGLE_FLSHBANK_BNKQ1 0x02
#define NEC_EAGLE_FLSHBANK_BNKQ0 0x01
/*
* SWITCH Setting Register
*/
#define NEC_EAGLE_SWTCHSET KSEG1ADDR(0x0DFFFFA8)
#define NEC_EAGLE_SWTCHSET_DP2SW4 0x80
#define NEC_EAGLE_SWTCHSET_DP2SW3 0x40
#define NEC_EAGLE_SWTCHSET_DP2SW2 0x20
#define NEC_EAGLE_SWTCHSET_DP2SW1 0x10
#define NEC_EAGLE_SWTCHSET_DP1SW4 0x08
#define NEC_EAGLE_SWTCHSET_DP1SW3 0x04
#define NEC_EAGLE_SWTCHSET_DP1SW2 0x02
#define NEC_EAGLE_SWTCHSET_DP1SW1 0x01
/*
* PPT Parallel Port Device Controller
*/
#define NEC_EAGLE_PPT_WRITE_DATA KSEG1ADDR(0x0DFFFFB0)
#define NEC_EAGLE_PPT_READ_DATA KSEG1ADDR(0x0DFFFFB2)
#define NEC_EAGLE_PPT_CNT KSEG1ADDR(0x0DFFFFB4)
#define NEC_EAGLE_PPT_CNT2 KSEG1ADDR(0x0DFFFFB4)
/* Control Register */
#define NEC_EAGLE_PPT_INTMSK 0x20
#define NEC_EAGLE_PPT_PARIINT 0x10
#define NEC_EAGLE_PPT_SELECTIN 0x08
#define NEC_EAGLE_PPT_INIT 0x04
#define NEC_EAGLE_PPT_AUTOFD 0x02
#define NEC_EAGLE_PPT_STROBE 0x01
/* Control Rgister 2 */
#define NEC_EAGLE_PPT_PAREN 0x80
#define NEC_EAGLE_PPT_AUTOEN 0x20
#define NEC_EAGLE_PPT_BUSY 0x10
#define NEC_EAGLE_PPT_ACK 0x08
#define NEC_EAGLE_PPT_PE 0x04
#define NEC_EAGLE_PPT_SELECT 0x02
#define NEC_EAGLE_PPT_FAULT 0x01
/*
* LEDWR Register
*/
#define NEC_EAGLE_LEDWR1 KSEG1ADDR(0x0DFFFFC0)
#define NEC_EAGLE_LEDWR2 KSEG1ADDR(0x0DFFFFC4)
/*
* SDBINT Register
*/
#define NEC_EAGLE_SDBINT KSEG1ADDR(0x0DFFFFD0)
#define NEC_EAGLE_SDBINT_PARINT 0x20
#define NEC_EAGLE_SDBINT_SIO2INT 0x10
#define NEC_EAGLE_SDBINT_SIO1INT 0x08
#define NEC_EAGLE_SDBINT_ENUM 0x04
#define NEC_EAGLE_SDBINT_DEG 0x02
/*
* SDB INTMSK Register
*/
#define NEC_EAGLE_SDBINTMSK KSEG1ADDR(0x0DFFFFD4)
#define NEC_EAGLE_SDBINTMSK_MSKPAR 0x20
#define NEC_EAGLE_SDBINTMSK_MSKSIO2 0x10
#define NEC_EAGLE_SDBINTMSK_MSKSIO1 0x08
#define NEC_EAGLE_SDBINTMSK_MSKENUM 0x04
#define NEC_EAGLE_SDBINTMSK_MSKDEG 0x02
/*
* RSTREG Register
*/
#define NEC_EAGLE_RSTREG KSEG1ADDR(0x0DFFFFD8)
#define NEC_EAGLE_RST_RSTSW 0x02
#define NEC_EAGLE_RST_LEDOFF 0x01
/*
* PCI INT Rgister
*/
#define NEC_EAGLE_PCIINTREG KSEG1ADDR(0x0DFFFFDC)
#define NEC_EAGLE_PCIINT_LANINT 0x10
#define NEC_EAGLE_PCIINT_CP_INTD 0x08
#define NEC_EAGLE_PCIINT_CP_INTC 0x04
#define NEC_EAGLE_PCIINT_CP_INTB 0x02
#define NEC_EAGLE_PCIINT_CP_INTA 0x01
/*
* PCI INT Mask Register
*/
#define NEC_EAGLE_PCIINTMSKREG KSEG1ADDR(0x0DFFFFE0)
#define NEC_EAGLE_PCIINTMSK_MSKLANINT 0x10
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTD 0x08
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTC 0x04
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTB 0x02
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTA 0x01
/*
* CLK Division Register
*/
#define NEC_EAGLE_CLKDIV KSEG1ADDR(0x0DFFFFE4)
#define NEC_EAGLE_CLKDIV_PCIDIV1 0x10
#define NEC_EAGLE_CLKDIV_PCIDIV0 0x08
#define NEC_EAGLE_CLKDIV_VTDIV2 0x04
#define NEC_EAGLE_CLKDIV_VTDIV1 0x02
#define NEC_EAGLE_CLKDIV_VTDIV0 0x01
/*
* Source Revision Register
*/
#define NEC_EAGLE_REVISION KSEG1ADDR(0x0DFFFFE8)
#endif /* __NEC_EAGLE_H */
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