Commit c27eac48 authored by Avinash Dayanand's avatar Avinash Dayanand Committed by Jeff Kirsher

i40e: Enable ADq and create queue channel/s on VF

This patch enables ADq and creates queue channels on a VF. An ADq
enabled VF can have up to 4 VSIs and each one of them represents
a traffic class and this is termed as a queue channel. Each of these
VSIs can have up to 4 queues. This patch services the request for
enabling ADq and adds queue channel based on the TC mqprio info
provided by the user in the VF.

Initially a check is made to see if spoof check is OFF, if not ADq
will not be enabled. PF notifies VF for a reset in order to complete
the creation of ADq resources i.e. creation of additional VSIs and
allocation of queues as per TC information, all in the reset path.

Steps:
======
1. Turn off the spoof check
2. Enable ADq using tc mqprio command with or without rate limit.
3. Pass traffic.

Example:
========
% ip link set dev eth0 vf 0 spoofchk off
% tc qdisc add dev $iface root mqprio num_tc 4 map\
	0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 queues\
	4@0 4@4 4@8 4@8 hw 1 mode channel

Expected results:
=================
1. Total number of queues for the VF should be sum of queues of all TCs.
2. Traffic flow should be normal without errors.
Signed-off-by: default avatarAvinash Dayanand <avinash.dayanand@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent d5b33d02
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
#define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) #define I40E_MASK(mask, shift) ((u32)(mask) << (shift))
#define I40E_MAX_VSI_QP 16 #define I40E_MAX_VSI_QP 16
#define I40E_MAX_VF_VSI 3 #define I40E_MAX_VF_VSI 4
#define I40E_MAX_CHAINED_RX_BUFFERS 5 #define I40E_MAX_CHAINED_RX_BUFFERS 5
#define I40E_MAX_PF_UDP_OFFLOAD_PORTS 16 #define I40E_MAX_PF_UDP_OFFLOAD_PORTS 16
......
...@@ -69,6 +69,18 @@ enum i40e_vf_capabilities { ...@@ -69,6 +69,18 @@ enum i40e_vf_capabilities {
I40E_VIRTCHNL_VF_CAP_IWARP, I40E_VIRTCHNL_VF_CAP_IWARP,
}; };
/* In ADq, max 4 VSI's can be allocated per VF including primary VF VSI.
* These variables are used to store indices, id's and number of queues
* for each VSI including that of primary VF VSI. Each Traffic class is
* termed as channel and each channel can in-turn have 4 queues which
* means max 16 queues overall per VF.
*/
struct i40evf_channel {
u16 vsi_idx; /* index in PF struct for all channel VSIs */
u16 vsi_id; /* VSI ID used by firmware */
u16 num_qps; /* number of queue pairs requested by user */
};
/* VF information structure */ /* VF information structure */
struct i40e_vf { struct i40e_vf {
struct i40e_pf *pf; struct i40e_pf *pf;
...@@ -111,6 +123,11 @@ struct i40e_vf { ...@@ -111,6 +123,11 @@ struct i40e_vf {
u16 num_mac; u16 num_mac;
u16 num_vlan; u16 num_vlan;
/* ADq related variables */
bool adq_enabled; /* flag to enable adq */
u8 num_tc;
struct i40evf_channel ch[I40E_MAX_VF_VSI];
/* RDMA Client */ /* RDMA Client */
struct virtchnl_iwarp_qvlist_info *qvlist_info; struct virtchnl_iwarp_qvlist_info *qvlist_info;
}; };
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment