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Kirill Smelkov
linux
Commits
c3032adb
Commit
c3032adb
authored
May 13, 2013
by
Ben Skeggs
Browse files
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Plain Diff
drm/nv50/vm: handle bar tlb flushes internally
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
fec43a72
Changes
3
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3 changed files
with
13 additions
and
5 deletions
+13
-5
drivers/gpu/drm/nouveau/core/include/subdev/vm.h
drivers/gpu/drm/nouveau/core/include/subdev/vm.h
+1
-1
drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c
drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c
+9
-4
drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
+3
-0
No files found.
drivers/gpu/drm/nouveau/core/include/subdev/vm.h
View file @
c3032adb
...
@@ -58,7 +58,7 @@ struct nouveau_vm {
...
@@ -58,7 +58,7 @@ struct nouveau_vm {
int
refcount
;
int
refcount
;
struct
list_head
pgd_list
;
struct
list_head
pgd_list
;
atomic_t
engref
[
64
];
//
NVDEV_SUBDEV_NR];
atomic_t
engref
[
NVDEV_SUBDEV_NR
];
struct
nouveau_vm_pgt
*
pgt
;
struct
nouveau_vm_pgt
*
pgt
;
u32
fpde
;
u32
fpde
;
...
...
drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c
View file @
c3032adb
...
@@ -53,7 +53,6 @@ nv50_bar_kmap(struct nouveau_bar *bar, struct nouveau_mem *mem,
...
@@ -53,7 +53,6 @@ nv50_bar_kmap(struct nouveau_bar *bar, struct nouveau_mem *mem,
return
ret
;
return
ret
;
nouveau_vm_map
(
vma
,
mem
);
nouveau_vm_map
(
vma
,
mem
);
nv50_vm_flush_engine
(
nv_subdev
(
bar
),
6
);
return
0
;
return
0
;
}
}
...
@@ -69,7 +68,6 @@ nv50_bar_umap(struct nouveau_bar *bar, struct nouveau_mem *mem,
...
@@ -69,7 +68,6 @@ nv50_bar_umap(struct nouveau_bar *bar, struct nouveau_mem *mem,
return
ret
;
return
ret
;
nouveau_vm_map
(
vma
,
mem
);
nouveau_vm_map
(
vma
,
mem
);
nv50_vm_flush_engine
(
nv_subdev
(
bar
),
6
);
return
0
;
return
0
;
}
}
...
@@ -77,7 +75,6 @@ static void
...
@@ -77,7 +75,6 @@ static void
nv50_bar_unmap
(
struct
nouveau_bar
*
bar
,
struct
nouveau_vma
*
vma
)
nv50_bar_unmap
(
struct
nouveau_bar
*
bar
,
struct
nouveau_vma
*
vma
)
{
{
nouveau_vm_unmap
(
vma
);
nouveau_vm_unmap
(
vma
);
nv50_vm_flush_engine
(
nv_subdev
(
bar
),
6
);
nouveau_vm_put
(
vma
);
nouveau_vm_put
(
vma
);
}
}
...
@@ -147,6 +144,8 @@ nv50_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
...
@@ -147,6 +144,8 @@ nv50_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if
(
ret
)
if
(
ret
)
return
ret
;
return
ret
;
atomic_inc
(
&
vm
->
engref
[
NVDEV_SUBDEV_BAR
]);
ret
=
nouveau_gpuobj_new
(
nv_object
(
priv
),
heap
,
ret
=
nouveau_gpuobj_new
(
nv_object
(
priv
),
heap
,
((
limit
--
-
start
)
>>
12
)
*
8
,
0x1000
,
((
limit
--
-
start
)
>>
12
)
*
8
,
0x1000
,
NVOBJ_FLAG_ZERO_ALLOC
,
&
vm
->
pgt
[
0
].
obj
[
0
]);
NVOBJ_FLAG_ZERO_ALLOC
,
&
vm
->
pgt
[
0
].
obj
[
0
]);
...
@@ -179,6 +178,8 @@ nv50_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
...
@@ -179,6 +178,8 @@ nv50_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if
(
ret
)
if
(
ret
)
return
ret
;
return
ret
;
atomic_inc
(
&
vm
->
engref
[
NVDEV_SUBDEV_BAR
]);
ret
=
nouveau_vm_ref
(
vm
,
&
priv
->
bar1_vm
,
priv
->
pgd
);
ret
=
nouveau_vm_ref
(
vm
,
&
priv
->
bar1_vm
,
priv
->
pgd
);
nouveau_vm_ref
(
NULL
,
&
vm
,
NULL
);
nouveau_vm_ref
(
NULL
,
&
vm
,
NULL
);
if
(
ret
)
if
(
ret
)
...
@@ -237,7 +238,11 @@ nv50_bar_init(struct nouveau_object *object)
...
@@ -237,7 +238,11 @@ nv50_bar_init(struct nouveau_object *object)
nv_mask
(
priv
,
0x000200
,
0x00000100
,
0x00000000
);
nv_mask
(
priv
,
0x000200
,
0x00000100
,
0x00000000
);
nv_mask
(
priv
,
0x000200
,
0x00000100
,
0x00000100
);
nv_mask
(
priv
,
0x000200
,
0x00000100
,
0x00000100
);
nv50_vm_flush_engine
(
nv_subdev
(
priv
),
6
);
nv_wr32
(
priv
,
0x100c80
,
0x00060001
);
if
(
!
nv_wait
(
priv
,
0x100c80
,
0x00000001
,
0x00000000
))
{
nv_error
(
priv
,
"vm flush timeout
\n
"
);
return
-
EBUSY
;
}
nv_wr32
(
priv
,
0x001704
,
0x00000000
|
priv
->
mem
->
addr
>>
12
);
nv_wr32
(
priv
,
0x001704
,
0x00000000
|
priv
->
mem
->
addr
>>
12
);
nv_wr32
(
priv
,
0x001704
,
0x40000000
|
priv
->
mem
->
addr
>>
12
);
nv_wr32
(
priv
,
0x001704
,
0x40000000
|
priv
->
mem
->
addr
>>
12
);
...
...
drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
View file @
c3032adb
...
@@ -155,6 +155,9 @@ nv50_vm_flush(struct nouveau_vm *vm)
...
@@ -155,6 +155,9 @@ nv50_vm_flush(struct nouveau_vm *vm)
int
i
;
int
i
;
for
(
i
=
0
;
i
<
NVDEV_SUBDEV_NR
;
i
++
)
{
for
(
i
=
0
;
i
<
NVDEV_SUBDEV_NR
;
i
++
)
{
if
(
atomic_read
(
&
vm
->
engref
[
i
])
&&
i
==
NVDEV_SUBDEV_BAR
)
{
nv50_vm_flush_engine
(
nv_subdev
(
vm
->
vmm
),
6
);
}
else
if
(
atomic_read
(
&
vm
->
engref
[
i
]))
{
if
(
atomic_read
(
&
vm
->
engref
[
i
]))
{
engine
=
nouveau_engine
(
vm
->
vmm
,
i
);
engine
=
nouveau_engine
(
vm
->
vmm
,
i
);
if
(
engine
&&
engine
->
tlb_flush
)
if
(
engine
&&
engine
->
tlb_flush
)
...
...
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