Commit c36d6aa6 authored by Srinivasa Rao Mandadapu's avatar Srinivasa Rao Mandadapu Committed by Bjorn Andersson

remoteproc: qcom: Replace hard coded values with macros

Replace hard coded values of QDSP6 boot control reg params
with appropriate macro names.
Signed-off-by: default avatarSrinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Reviewed-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1664368073-13659-6-git-send-email-quic_srivasam@quicinc.com
parent 48ab209c
...@@ -54,6 +54,9 @@ ...@@ -54,6 +54,9 @@
#define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3 #define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3
#define LPASS_BOOT_CORE_START BIT(0)
#define LPASS_BOOT_CMD_START BIT(0)
struct adsp_pil_data { struct adsp_pil_data {
int crash_reason_smem; int crash_reason_smem;
const char *firmware_name; const char *firmware_name;
...@@ -365,10 +368,10 @@ static int adsp_start(struct rproc *rproc) ...@@ -365,10 +368,10 @@ static int adsp_start(struct rproc *rproc)
writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG);
/* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */
writel(0x1, adsp->qdsp6ss_base + CORE_START_REG); writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG);
/* Trigger boot FSM to start QDSP6 */ /* Trigger boot FSM to start QDSP6 */
writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG); writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG);
/* Wait for core to come out of reset */ /* Wait for core to come out of reset */
ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG,
......
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