Commit c3a2ddee authored by Simon Arlott's avatar Simon Arlott Committed by Adrian Bunk

spelling fixes: arch/alpha/

Spelling fixes in arch/alpha/.
Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: default avatarAdrian Bunk <bunk@kernel.org>
parent 24b7ce98
......@@ -1082,7 +1082,7 @@ marvel_machine_check(u64 vector, u64 la_ptr)
}
/*
* A system event or error has occured, handle it here.
* A system event or error has occurred, handle it here.
*
* Any errors in the logout frame have already been cleared by the
* PALcode, so just parse it.
......
......@@ -591,7 +591,7 @@ privateer_process_680_frame(struct el_common *mchk_header, int print)
(struct el_PRIVATEER_envdata_mcheck *)
((unsigned long)mchk_header + mchk_header->sys_offset);
/* TODO - catagorize errors, for now, no error */
/* TODO - categorize errors, for now, no error */
if (!print)
return status;
......
......@@ -715,7 +715,7 @@ osf_setsysinfo(unsigned long op, void __user *buffer, unsigned long nbytes,
/*
* Alpha Architecture Handbook 4.7.7.3:
* To be fully IEEE compiant, we must track the current IEEE
* exception state in software, because spurrious bits can be
* exception state in software, because spurious bits can be
* set in the trap shadow of a software-complete insn.
*/
......
......@@ -439,7 +439,6 @@ setup_smp(void)
((char *)cpubase + i*hwrpb->processor_size);
if ((cpu->flags & 0x1cc) == 0x1cc) {
smp_num_probed++;
/* Assume here that "whami" == index */
cpu_set(i, cpu_present_map);
cpu->pal_revision = boot_cpu_palrev;
}
......
......@@ -138,7 +138,7 @@ alcor_init_irq(void)
for (i = 16; i < 48; ++i) {
/* On Alcor, at least, lines 20..30 are not connected
and can generate spurrious interrupts if we turn them
and can generate spurious interrupts if we turn them
on while IRQ probing. */
if (i >= 16+20 && i <= 16+30)
continue;
......
......@@ -78,7 +78,7 @@ alphabook1_init_arch(void)
* example, sound boards seem to like using IRQ 9.
*
* This is NOT how we should do it. PIRQ0-X should have
* their own IRQ's, the way intel uses the IO-APIC irq's.
* their own IRQs, the way intel uses the IO-APIC IRQs.
*/
static void __init
......
......@@ -5,7 +5,7 @@
* in an architecture-specific manner due to speed..
* Comments in other versions indicate that the algorithms are from RFC1071
*
* accellerated versions (and 21264 assembly versions ) contributed by
* accelerated versions (and 21264 assembly versions ) contributed by
* Rick Gorton <rick.gorton@alpha-processor.com>
*/
......
......@@ -2,7 +2,7 @@
* csum_partial_copy - do IP checksumming and copy
*
* (C) Copyright 1996 Linus Torvalds
* accellerated versions (and 21264 assembly versions ) contributed by
* accelerated versions (and 21264 assembly versions ) contributed by
* Rick Gorton <rick.gorton@alpha-processor.com>
*
* Don't look at this too closely - you'll go mad. The things
......
......@@ -235,7 +235,7 @@ callback_init(void * kernel_end)
unsigned long pfn = crb->map[i].pa >> PAGE_SHIFT;
crb->map[i].va = vaddr;
for (j = 0; j < crb->map[i].count; ++j) {
/* Newer console's (especially on larger
/* Newer consoles (especially on larger
systems) may require more pages of
PTEs. Grab additional pages as needed. */
if (pmd != pmd_offset(pgd, vaddr)) {
......
......@@ -38,7 +38,7 @@ struct op_register_config {
unsigned long need_reset;
};
/* Per-architecture configury and hooks. */
/* Per-architecture configuration and hooks. */
struct op_axp_model {
void (*reg_setup) (struct op_register_config *,
struct op_counter_config *,
......
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