Commit c5d9da4a authored by Laxman Dewangan's avatar Laxman Dewangan Committed by Stephen Warren

ARM: tegra: add APB DMA nodes to Tegra114 DT

NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in Tegra114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.
Signed-off-by: default avatarLaxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed DT node order]
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 6c716db5
......@@ -33,6 +33,44 @@ tegra_car: clock {
#clock-cells = <1>;
};
apbdma: dma {
compatible = "nvidia,tegra114-apbdma";
reg = <0x6000a000 0x1400>;
interrupts = <0 104 0x04
0 105 0x04
0 106 0x04
0 107 0x04
0 108 0x04
0 109 0x04
0 110 0x04
0 111 0x04
0 112 0x04
0 113 0x04
0 114 0x04
0 115 0x04
0 116 0x04
0 117 0x04
0 118 0x04
0 119 0x04
0 128 0x04
0 129 0x04
0 130 0x04
0 131 0x04
0 132 0x04
0 133 0x04
0 134 0x04
0 135 0x04
0 136 0x04
0 137 0x04
0 138 0x04
0 139 0x04
0 140 0x04
0 141 0x04
0 142 0x04
0 143 0x04>;
clocks = <&tegra_car 34>;
};
ahb: ahb {
compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
reg = <0x6000c004 0x14c>;
......
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