Commit c62a59d0 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: added support for new se_cac_idx APIs to cgs

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f11fb02
...@@ -240,6 +240,8 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device, ...@@ -240,6 +240,8 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
return RREG32_DIDT(index); return RREG32_DIDT(index);
case CGS_IND_REG_GC_CAC: case CGS_IND_REG_GC_CAC:
return RREG32_GC_CAC(index); return RREG32_GC_CAC(index);
case CGS_IND_REG_SE_CAC:
return RREG32_SE_CAC(index);
case CGS_IND_REG__AUDIO_ENDPT: case CGS_IND_REG__AUDIO_ENDPT:
DRM_ERROR("audio endpt register access not implemented.\n"); DRM_ERROR("audio endpt register access not implemented.\n");
return 0; return 0;
...@@ -266,6 +268,8 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device, ...@@ -266,6 +268,8 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
return WREG32_DIDT(index, value); return WREG32_DIDT(index, value);
case CGS_IND_REG_GC_CAC: case CGS_IND_REG_GC_CAC:
return WREG32_GC_CAC(index, value); return WREG32_GC_CAC(index, value);
case CGS_IND_REG_SE_CAC:
return WREG32_SE_CAC(index, value);
case CGS_IND_REG__AUDIO_ENDPT: case CGS_IND_REG__AUDIO_ENDPT:
DRM_ERROR("audio endpt register access not implemented.\n"); DRM_ERROR("audio endpt register access not implemented.\n");
return; return;
......
...@@ -50,6 +50,7 @@ enum cgs_ind_reg { ...@@ -50,6 +50,7 @@ enum cgs_ind_reg {
CGS_IND_REG__UVD_CTX, CGS_IND_REG__UVD_CTX,
CGS_IND_REG__DIDT, CGS_IND_REG__DIDT,
CGS_IND_REG_GC_CAC, CGS_IND_REG_GC_CAC,
CGS_IND_REG_SE_CAC,
CGS_IND_REG__AUDIO_ENDPT CGS_IND_REG__AUDIO_ENDPT
}; };
......
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