Commit c6983166 authored by Benson Leung's avatar Benson Leung Committed by Chanwoo Choi

extcon: cros-ec: Add extcon-cros-ec driver to support display out

This is the driver for the USB Type C cable detection mechanism
built into the ChromeOS Embedded Controller on systems that
have USB Type-C ports.

At present, this allows for the presence of display out, but in
future, it may also be used to notify host and device type cables
and the presence of power.
Signed-off-by: default avatarBenson Leung <bleung@chromium.org>
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: default avatarChanwoo Choi <cw00.chio@samsung.com>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent 5771a8c0
......@@ -150,4 +150,11 @@ config EXTCON_USB_GPIO
Say Y here to enable GPIO based USB cable detection extcon support.
Used typically if GPIO is used for USB ID pin detection.
config EXTCON_USBC_CROS_EC
tristate "ChromeOS Embedded Controller EXTCON support"
depends on MFD_CROS_EC
help
Say Y here to enable USB Type C cable detection extcon support when
using Chrome OS EC based USB Type-C ports.
endif
......@@ -20,3 +20,4 @@ obj-$(CONFIG_EXTCON_QCOM_SPMI_MISC) += extcon-qcom-spmi-misc.o
obj-$(CONFIG_EXTCON_RT8973A) += extcon-rt8973a.o
obj-$(CONFIG_EXTCON_SM5502) += extcon-sm5502.o
obj-$(CONFIG_EXTCON_USB_GPIO) += extcon-usb-gpio.o
obj-$(CONFIG_EXTCON_USBC_CROS_EC) += extcon-usbc-cros-ec.o
This diff is collapsed.
......@@ -285,6 +285,11 @@ enum host_event_code {
EC_HOST_EVENT_HANG_DETECT = 20,
/* Hang detect logic detected a hang and warm rebooted the AP */
EC_HOST_EVENT_HANG_REBOOT = 21,
/* PD MCU triggering host event */
EC_HOST_EVENT_PD_MCU = 22,
/* EC desires to change state of host-controlled USB mux */
EC_HOST_EVENT_USB_MUX = 28,
/*
* The high bit of the event mask is not used as a host event code. If
......@@ -2905,6 +2910,76 @@ struct ec_params_usb_pd_control {
uint8_t mux;
} __packed;
#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */
#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */
#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */
struct ec_response_usb_pd_control_v1 {
uint8_t enabled;
uint8_t role;
uint8_t polarity;
char state[32];
} __packed;
#define EC_CMD_USB_PD_PORTS 0x102
struct ec_response_usb_pd_ports {
uint8_t num_ports;
} __packed;
#define EC_CMD_USB_PD_POWER_INFO 0x103
#define PD_POWER_CHARGING_PORT 0xff
struct ec_params_usb_pd_power_info {
uint8_t port;
} __packed;
enum usb_chg_type {
USB_CHG_TYPE_NONE,
USB_CHG_TYPE_PD,
USB_CHG_TYPE_C,
USB_CHG_TYPE_PROPRIETARY,
USB_CHG_TYPE_BC12_DCP,
USB_CHG_TYPE_BC12_CDP,
USB_CHG_TYPE_BC12_SDP,
USB_CHG_TYPE_OTHER,
USB_CHG_TYPE_VBUS,
USB_CHG_TYPE_UNKNOWN,
};
struct usb_chg_measures {
uint16_t voltage_max;
uint16_t voltage_now;
uint16_t current_max;
uint16_t current_lim;
} __packed;
struct ec_response_usb_pd_power_info {
uint8_t role;
uint8_t type;
uint8_t dualrole;
uint8_t reserved1;
struct usb_chg_measures meas;
uint32_t max_power;
} __packed;
/* Get info about USB-C SS muxes */
#define EC_CMD_USB_PD_MUX_INFO 0x11a
struct ec_params_usb_pd_mux_info {
uint8_t port; /* USB-C port number */
} __packed;
/* Flags representing mux state */
#define USB_PD_MUX_USB_ENABLED (1 << 0)
#define USB_PD_MUX_DP_ENABLED (1 << 1)
#define USB_PD_MUX_POLARITY_INVERTED (1 << 2)
#define USB_PD_MUX_HPD_IRQ (1 << 3)
struct ec_response_usb_pd_mux_info {
uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
} __packed;
/*****************************************************************************/
/*
* Passthru commands
......
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