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Commit c707844d authored by Jaedon Shin's avatar Jaedon Shin Committed by Ralf Baechle
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MIPS: BMIPS: Add support GPIO device nodes 

Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14001/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7bbe59dd
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Showing with 246 additions and 0 deletions
arch/mips/boot/dts/brcm/bcm7125.dtsi
View file @ c707844d
......@@ -197,6 +197,18 @@ pwma: pwm@406580 {
status = "disabled";
};
upg_gio: gpio@406700 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406700 0x80>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 18>;
};
ehci0: usb@488300 {
compatible = "brcm,bcm7125-ehci", "generic-ehci";
reg = <0x488300 0x100>;
......
arch/mips/boot/dts/brcm/bcm7346.dtsi
View file @ c707844d
......@@ -232,6 +232,43 @@ pwmb: pwm@406800 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <53>;
brcm,irq-can-wake;
};
upg_gio: gpio@406700 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406700 0x60>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 16>;
};
upg_gio_aon: gpio@408c00 {
compatible = "brcm,brcmstb-gpio";
reg = <0x408c00 0x60>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <27 32 2>;
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7358.dtsi
View file @ c707844d
......@@ -216,6 +216,43 @@ pwmb: pwm@406700 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408240 {
compatible = "brcm,l2-intc";
reg = <0x408240 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <50>;
brcm,irq-can-wake;
};
upg_gio: gpio@406500 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406500 0xa0>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 29 4>;
};
upg_gio_aon: gpio@408c00 {
compatible = "brcm,brcmstb-gpio";
reg = <0x408c00 0x60>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <21 32 2>;
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7360.dtsi
View file @ c707844d
......@@ -208,6 +208,43 @@ pwma: pwm@406400 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <50>;
brcm,irq-can-wake;
};
upg_gio: gpio@406500 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406500 0xa0>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 29 4>;
};
upg_gio_aon: gpio@408c00 {
compatible = "brcm,brcmstb-gpio";
reg = <0x408c00 0x60>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <21 32 2>;
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7362.dtsi
View file @ c707844d
......@@ -204,6 +204,43 @@ pwma: pwm@406400 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <50>;
brcm,irq-can-wake;
};
upg_gio: gpio@406500 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406500 0xa0>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 29 4>;
};
upg_gio_aon: gpio@408c00 {
compatible = "brcm,brcmstb-gpio";
reg = <0x408c00 0x60>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <21 32 2>;
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7420.dtsi
View file @ c707844d
......@@ -213,6 +213,18 @@ pwmb: pwm@406880 {
status = "disabled";
};
upg_gio: gpio@406700 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406700 0x80>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 27>;
};
enet0: ethernet@468000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7425.dtsi
View file @ c707844d
......@@ -231,6 +231,43 @@ pwmb: pwm@406800 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <49>;
brcm,irq-can-wake;
};
upg_gio: gpio@406700 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406700 0x80>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 21>;
};
upg_gio_aon: gpio@4094c0 {
compatible = "brcm,brcmstb-gpio";
reg = <0x4094c0 0x40>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <18 4>;
};
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
arch/mips/boot/dts/brcm/bcm7435.dtsi
View file @ c707844d
......@@ -246,6 +246,43 @@ pwmb: pwm@406800 {
status = "disabled";
};
aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <54>;
brcm,irq-can-wake;
};
upg_gio: gpio@406700 {
compatible = "brcm,brcmstb-gpio";
reg = <0x406700 0x80>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_irq0_intc>;
interrupts = <6>;
brcm,gpio-bank-widths = <32 32 32 21>;
};
upg_gio_aon: gpio@4094c0 {
compatible = "brcm,brcmstb-gpio";
reg = <0x4094c0 0x40>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
interrupt-parent = <&upg_aon_irq0_intc>;
interrupts = <6>;
interrupts-extended = <&upg_aon_irq0_intc 6>,
<&aon_pm_l2_intc 5>;
wakeup-source;
brcm,gpio-bank-widths = <18 4>;
};
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
......
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