Commit c8159a6b authored by Florian Fainelli's avatar Florian Fainelli

ARM: dts: bcm-mobile: Fix most DTC W=1 warnings

Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent c7b23bcb
......@@ -100,7 +100,7 @@ uart@3e003000 {
reg-io-width = <4>;
};
L2: l2-cache {
L2: l2-cache@3ff20000 {
compatible = "brcm,bcm11351-a2-pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
......@@ -225,21 +225,21 @@ clocks {
#size-cells = <1>;
ranges;
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = "brcm,bcm11351-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
hub_ccu: hub_ccu {
hub_ccu: hub_ccu@34000000 {
compatible = "brcm,bcm11351-hub-ccu";
reg = <0x34000000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "tmon_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = "brcm,bcm11351-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
......@@ -248,7 +248,7 @@ aon_ccu: aon_ccu {
"pmu_bsc_var";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = "brcm,bcm11351-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
......@@ -261,7 +261,7 @@ master_ccu: master_ccu {
"hsic2_12m";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = "brcm,bcm11351-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
......
......@@ -21,7 +21,7 @@ / {
model = "BCM21664 Garnet board";
compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};
......
......@@ -90,7 +90,7 @@ uart@3e002000 {
reg-io-width = <4>;
};
L2: l2-cache {
L2: l2-cache@3ff20000 {
compatible = "arm,pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
......@@ -295,21 +295,21 @@ var_156m_clk: var_156m {
clock-frequency = <156000000>;
};
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
......@@ -323,7 +323,7 @@ master_ccu: master_ccu {
"sdio4_sleep";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
......
......@@ -45,7 +45,7 @@ chosen {
bootargs = "console=ttyS0,115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
......
......@@ -371,21 +371,21 @@ var_156m_clk: var_156m {
clock-frequency = <156000000>;
};
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
......@@ -398,7 +398,7 @@ slave_ccu: slave_ccu {
"bsc4";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
......
......@@ -21,7 +21,7 @@ / {
model = "BCM28155 AP board";
compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};
......
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