Commit c819dbd0 authored by Mubin Sayyed's avatar Mubin Sayyed Committed by Daniel Lezcano

dt-bindings: timer: Add support for cadence TTC PWM

Cadence TTC can act as PWM device, it will be supported through
separate PWM framework based driver. Decision to configure
specific TTC device as PWM or clocksource/clockevent would
be done based on presence of "#pwm-cells" property.

Also, interrupt property is not required for TTC PWM driver.
Update bindings to support TTC PWM configuration.
Signed-off-by: default avatarMubin Sayyed <mubin.sayyed@amd.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240226093333.2581092-1-mubin.sayyed@amd.com
parent 755350bc
...@@ -32,12 +32,23 @@ properties: ...@@ -32,12 +32,23 @@ properties:
description: | description: |
Bit width of the timer, necessary if not 16. Bit width of the timer, necessary if not 16.
"#pwm-cells":
const: 3
required: required:
- compatible - compatible
- reg - reg
- interrupts
- clocks - clocks
allOf:
- if:
not:
required:
- "#pwm-cells"
then:
required:
- interrupts
additionalProperties: false additionalProperties: false
examples: examples:
...@@ -50,3 +61,12 @@ examples: ...@@ -50,3 +61,12 @@ examples:
clocks = <&cpu_clk 3>; clocks = <&cpu_clk 3>;
timer-width = <32>; timer-width = <32>;
}; };
- |
pwm: pwm@f8002000 {
compatible = "cdns,ttc";
reg = <0xf8002000 0x1000>;
clocks = <&cpu_clk 3>;
timer-width = <32>;
#pwm-cells = <3>;
};
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