Commit c9558869 authored by Himanshu Madhani's avatar Himanshu Madhani Committed by Martin K. Petersen

scsi: qla2xxx: Add ATIO-Q processing for INTx mode

Signed-off-by: default avatarHimanshu Madhani <himanshu.madhani@cavium.com>
Reviewed-by: default avatarJohannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent e7240af5
...@@ -922,6 +922,7 @@ struct mbx_cmd_32 { ...@@ -922,6 +922,7 @@ struct mbx_cmd_32 {
#define INTR_RSP_QUE_UPDATE_83XX 0x14 #define INTR_RSP_QUE_UPDATE_83XX 0x14
#define INTR_ATIO_QUE_UPDATE 0x1C #define INTR_ATIO_QUE_UPDATE 0x1C
#define INTR_ATIO_RSP_QUE_UPDATE 0x1D #define INTR_ATIO_RSP_QUE_UPDATE 0x1D
#define INTR_ATIO_QUE_UPDATE_27XX 0x1E
/* ISP mailbox loopback echo diagnostic error code */ /* ISP mailbox loopback echo diagnostic error code */
#define MBS_LB_RESET 0x17 #define MBS_LB_RESET 0x17
......
...@@ -3129,6 +3129,7 @@ qla24xx_intr_handler(int irq, void *dev_id) ...@@ -3129,6 +3129,7 @@ qla24xx_intr_handler(int irq, void *dev_id)
case INTR_RSP_QUE_UPDATE_83XX: case INTR_RSP_QUE_UPDATE_83XX:
qla24xx_process_response_queue(vha, rsp); qla24xx_process_response_queue(vha, rsp);
break; break;
case INTR_ATIO_QUE_UPDATE_27XX:
case INTR_ATIO_QUE_UPDATE:{ case INTR_ATIO_QUE_UPDATE:{
unsigned long flags2; unsigned long flags2;
spin_lock_irqsave(&ha->tgt.atio_lock, flags2); spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
...@@ -3259,6 +3260,7 @@ qla24xx_msix_default(int irq, void *dev_id) ...@@ -3259,6 +3260,7 @@ qla24xx_msix_default(int irq, void *dev_id)
case INTR_RSP_QUE_UPDATE_83XX: case INTR_RSP_QUE_UPDATE_83XX:
qla24xx_process_response_queue(vha, rsp); qla24xx_process_response_queue(vha, rsp);
break; break;
case INTR_ATIO_QUE_UPDATE_27XX:
case INTR_ATIO_QUE_UPDATE:{ case INTR_ATIO_QUE_UPDATE:{
unsigned long flags2; unsigned long flags2;
spin_lock_irqsave(&ha->tgt.atio_lock, flags2); spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
...@@ -3347,7 +3349,8 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) ...@@ -3347,7 +3349,8 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
.pre_vectors = QLA_BASE_VECTORS, .pre_vectors = QLA_BASE_VECTORS,
}; };
if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
IS_ATIO_MSIX_CAPABLE(ha)) {
desc.pre_vectors++; desc.pre_vectors++;
min_vecs++; min_vecs++;
} }
...@@ -3432,7 +3435,8 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) ...@@ -3432,7 +3435,8 @@ qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
* If target mode is enable, also request the vector for the ATIO * If target mode is enable, also request the vector for the ATIO
* queue. * queue.
*/ */
if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
IS_ATIO_MSIX_CAPABLE(ha)) {
qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
rsp->msix = qentry; rsp->msix = qentry;
qentry->handle = rsp; qentry->handle = rsp;
......
...@@ -6546,6 +6546,7 @@ void ...@@ -6546,6 +6546,7 @@ void
qlt_24xx_config_rings(struct scsi_qla_host *vha) qlt_24xx_config_rings(struct scsi_qla_host *vha)
{ {
struct qla_hw_data *ha = vha->hw; struct qla_hw_data *ha = vha->hw;
struct init_cb_24xx *icb;
if (!QLA_TGT_MODE_ENABLED()) if (!QLA_TGT_MODE_ENABLED())
return; return;
...@@ -6553,14 +6554,19 @@ qlt_24xx_config_rings(struct scsi_qla_host *vha) ...@@ -6553,14 +6554,19 @@ qlt_24xx_config_rings(struct scsi_qla_host *vha)
WRT_REG_DWORD(ISP_ATIO_Q_OUT(vha), 0); WRT_REG_DWORD(ISP_ATIO_Q_OUT(vha), 0);
RD_REG_DWORD(ISP_ATIO_Q_OUT(vha)); RD_REG_DWORD(ISP_ATIO_Q_OUT(vha));
if (IS_ATIO_MSIX_CAPABLE(ha)) { icb = (struct init_cb_24xx *)ha->init_cb;
if ((ql2xenablemsix != 0) && IS_ATIO_MSIX_CAPABLE(ha)) {
struct qla_msix_entry *msix = &ha->msix_entries[2]; struct qla_msix_entry *msix = &ha->msix_entries[2];
struct init_cb_24xx *icb = (struct init_cb_24xx *)ha->init_cb;
icb->msix_atio = cpu_to_le16(msix->entry); icb->msix_atio = cpu_to_le16(msix->entry);
ql_dbg(ql_dbg_init, vha, 0xf072, ql_dbg(ql_dbg_init, vha, 0xf072,
"Registering ICB vector 0x%x for atio que.\n", "Registering ICB vector 0x%x for atio que.\n",
msix->entry); msix->entry);
} else if (ql2xenablemsix == 0) {
icb->firmware_options_2 |= cpu_to_le32(BIT_26);
ql_dbg(ql_dbg_init, vha, 0xf07f,
"Registering INTx vector for ATIO.\n");
} }
} }
...@@ -6805,7 +6811,7 @@ qlt_probe_one_stage1(struct scsi_qla_host *base_vha, struct qla_hw_data *ha) ...@@ -6805,7 +6811,7 @@ qlt_probe_one_stage1(struct scsi_qla_host *base_vha, struct qla_hw_data *ha)
if (!QLA_TGT_MODE_ENABLED()) if (!QLA_TGT_MODE_ENABLED())
return; return;
if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { if ((ql2xenablemsix == 0) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
ISP_ATIO_Q_IN(base_vha) = &ha->mqiobase->isp25mq.atio_q_in; ISP_ATIO_Q_IN(base_vha) = &ha->mqiobase->isp25mq.atio_q_in;
ISP_ATIO_Q_OUT(base_vha) = &ha->mqiobase->isp25mq.atio_q_out; ISP_ATIO_Q_OUT(base_vha) = &ha->mqiobase->isp25mq.atio_q_out;
} else { } else {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment