Commit cab6f070 authored by Chris Zhong's avatar Chris Zhong Committed by Heiko Stuebner

ARM: dts: rockchip: add rk3288 mipi_dsi nodes

Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: default avatarChris Zhong <zyw@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 3a429492
......@@ -815,6 +815,10 @@ vopb_out_hdmi: endpoint@0 {
reg = <0>;
remote-endpoint = <&hdmi_in_vopb>;
};
vopb_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopb>;
};
};
};
......@@ -848,6 +852,10 @@ vopl_out_hdmi: endpoint@0 {
reg = <0>;
remote-endpoint = <&hdmi_in_vopl>;
};
vopl_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopl>;
};
};
};
......@@ -861,6 +869,37 @@ vopl_mmu: iommu@ff940300 {
status = "disabled";
};
mipi_dsi: mipi@ff960000 {
compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0xff960000 0x4000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
clock-names = "ref", "pclk";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
mipi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_mipi>;
};
mipi_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_mipi>;
};
};
};
};
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0xff980000 0x20000>;
......
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