Commit cb57e089 authored by Anton Blanchard's avatar Anton Blanchard

Merge samba.org:/home/anton/ppc64/linux-2.5

into samba.org:/home/anton/ppc64/for-linus-ppc64
parents 83161bf9 535a8a4c
......@@ -30,6 +30,8 @@ ENTRY(do_div64)
moveq lr, #1 @ only divide low bits
moveq nh, onl
tst dh, #0x80000000
bne 2f
1: cmp nh, dh
bls 2f
add lr, lr, #1
......
......@@ -533,14 +533,19 @@ static int lapic_resume(struct sys_device *dev)
if (!apic_pm_state.active)
return 0;
/* XXX: Pavel needs this for S3 resume, but can't explain why */
set_fixmap_nocache(FIX_APIC_BASE, APIC_DEFAULT_PHYS_BASE);
local_irq_save(flags);
/*
* Make sure the APICBASE points to the right address
*
* FIXME! This will be wrong if we ever support suspend on
* SMP! We'll need to do this as part of the CPU restore!
*/
rdmsr(MSR_IA32_APICBASE, l, h);
l &= ~MSR_IA32_APICBASE_BASE;
l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
wrmsr(MSR_IA32_APICBASE, l, h);
apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED);
apic_write(APIC_ID, apic_pm_state.apic_id);
apic_write(APIC_DFR, apic_pm_state.apic_dfr);
......@@ -680,6 +685,12 @@ static int __init detect_init_APIC (void)
}
set_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
/* The BIOS may have set up the APIC at some other address */
rdmsr(MSR_IA32_APICBASE, l, h);
if (l & MSR_IA32_APICBASE_ENABLE)
mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
if (nmi_watchdog != NMI_NONE)
nmi_watchdog = NMI_LOCAL_APIC;
......
......@@ -355,13 +355,15 @@ static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
aec62xx_tune_drive(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
static int aec62xx_irq_timeout (ide_drive_t *drive)
......
......@@ -484,13 +484,15 @@ static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
config_chipset_for_pio(drive, 1);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
static int cmd64x_alt_dma_status (struct pci_dev *dev)
......
......@@ -215,17 +215,19 @@ static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
#ifndef CONFIG_HPT34X_AUTODMA
return hwif->ide_dma_off_quietly(drive);
#else
return hwif->ide_dma_on(drive);
#endif
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hpt34x_tune_drive(drive, 255);
return hwif->ide_dma_off_quietly(drive);
}
#ifndef CONFIG_HPT34X_AUTODMA
return hwif->ide_dma_off_quietly(drive);
#endif /* CONFIG_HPT34X_AUTODMA */
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/*
......
......@@ -538,13 +538,15 @@ static int hpt366_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hpt3xx_tune_drive(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/*
......
......@@ -227,13 +227,15 @@ static int it8172_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
it8172_tune_drive(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
static unsigned int __init init_chipset_it8172 (struct pci_dev *dev, const char *name)
......
......@@ -414,13 +414,15 @@ static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hwif->tuneproc(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
static int pdcnew_quirkproc (ide_drive_t *drive)
......
......@@ -518,13 +518,15 @@ static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hwif->tuneproc(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
static int pdc202xx_quirkproc (ide_drive_t *drive)
......
......@@ -588,13 +588,15 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hwif->tuneproc(drive, 255);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/**
......
......@@ -484,6 +484,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto no_dma_set;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
......@@ -491,7 +492,8 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
// hwif->tuneproc(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/* This can go soon */
......
......@@ -515,13 +515,15 @@ static int siimage_config_drive_for_dma (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
config_chipset_for_pio(drive, 1);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/* returns 1 if dma irq issued, 0 otherwise */
......
......@@ -696,13 +696,15 @@ static int sis5513_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
sis5513_tune_drive(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
/* initiates/aborts (U)DMA read/write operations on a drive. */
......
......@@ -301,13 +301,15 @@ static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
} else {
goto fast_ata_pio;
}
return hwif->ide_dma_on(drive);
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
no_dma_set:
hwif->tuneproc(drive, 5);
return hwif->ide_dma_off_quietly(drive);
}
return hwif->ide_dma_on(drive);
/* IORDY not supported */
return 0;
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
......
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