Commit cbe8c735 authored by Mohammed Shafi Shajakhan's avatar Mohammed Shafi Shajakhan Committed by John W. Linville

ath9k_hw: remove aggregation protection mode

when aggregation protection mode is enabled the hardware needs
to send RTS/CTS for each HT frame. Currently its disabled so
remove the unused call backs.
Signed-off-by: default avatarMohammed Shafi Shajakhan <mshajakhan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 7e4b4eec
...@@ -415,15 +415,6 @@ static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds) ...@@ -415,15 +415,6 @@ static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr); ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
} }
static void ar9002_hw_set11n_burstduration(struct ath_hw *ah, void *ds,
u32 burstDuration)
{
struct ar5416_desc *ads = AR5416DESC(ds);
ads->ds_ctl2 &= ~AR_BurstDur;
ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur);
}
void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
u32 size, u32 flags) u32 size, u32 flags)
{ {
...@@ -456,6 +447,5 @@ void ar9002_hw_attach_mac_ops(struct ath_hw *ah) ...@@ -456,6 +447,5 @@ void ar9002_hw_attach_mac_ops(struct ath_hw *ah)
ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle; ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle;
ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last; ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last;
ops->clr11n_aggr = ar9002_hw_clr11n_aggr; ops->clr11n_aggr = ar9002_hw_clr11n_aggr;
ops->set11n_burstduration = ar9002_hw_set11n_burstduration;
ops->set_clrdmask = ar9002_hw_set_clrdmask; ops->set_clrdmask = ar9002_hw_set_clrdmask;
} }
...@@ -484,16 +484,6 @@ static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds) ...@@ -484,16 +484,6 @@ static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr); ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr);
} }
static void ar9003_hw_set11n_burstduration(struct ath_hw *ah, void *ds,
u32 burstDuration)
{
struct ar9003_txc *ads = (struct ar9003_txc *) ds;
ads->ctl13 &= ~AR_BurstDur;
ads->ctl13 |= SM(burstDuration, AR_BurstDur);
}
void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains) void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains)
{ {
struct ar9003_txc *ads = ds; struct ar9003_txc *ads = ds;
...@@ -518,7 +508,6 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw) ...@@ -518,7 +508,6 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle; ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle;
ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last; ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last;
ops->clr11n_aggr = ar9003_hw_clr11n_aggr; ops->clr11n_aggr = ar9003_hw_clr11n_aggr;
ops->set11n_burstduration = ar9003_hw_set11n_burstduration;
ops->set_clrdmask = ar9003_hw_set_clrdmask; ops->set_clrdmask = ar9003_hw_set_clrdmask;
} }
......
...@@ -62,7 +62,6 @@ struct ath_node; ...@@ -62,7 +62,6 @@ struct ath_node;
#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
struct ath_config { struct ath_config {
u32 ath_aggr_prot;
u16 txpowlimit; u16 txpowlimit;
u8 cabqReadytime; u8 cabqReadytime;
}; };
......
...@@ -116,12 +116,6 @@ static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds) ...@@ -116,12 +116,6 @@ static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
ath9k_hw_ops(ah)->clr11n_aggr(ah, ds); ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
} }
static inline void ath9k_hw_set11n_burstduration(struct ath_hw *ah, void *ds,
u32 burstDuration)
{
ath9k_hw_ops(ah)->set11n_burstduration(ah, ds, burstDuration);
}
static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val) static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
{ {
ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val); ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
......
...@@ -628,8 +628,6 @@ struct ath_hw_ops { ...@@ -628,8 +628,6 @@ struct ath_hw_ops {
u32 numDelims); u32 numDelims);
void (*set11n_aggr_last)(struct ath_hw *ah, void *ds); void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
void (*clr11n_aggr)(struct ath_hw *ah, void *ds); void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
void (*set11n_burstduration)(struct ath_hw *ah, void *ds,
u32 burstDuration);
void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val); void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
}; };
......
...@@ -2039,9 +2039,6 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw, ...@@ -2039,9 +2039,6 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
if (changed & BSS_CHANGED_BSSID) { if (changed & BSS_CHANGED_BSSID) {
ath9k_config_bss(sc, vif); ath9k_config_bss(sc, vif);
/* Set aggregation protection mode parameters */
sc->config.ath_aggr_prot = 0;
ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n", ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
common->curbssid, common->curaid); common->curbssid, common->curaid);
} }
......
...@@ -1663,8 +1663,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len) ...@@ -1663,8 +1663,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
rix = rates[i].idx; rix = rates[i].idx;
series[i].Tries = rates[i].count; series[i].Tries = rates[i].count;
if ((sc->config.ath_aggr_prot && bf_isaggr(bf)) || if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
(rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS)) {
series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS; series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
flags |= ATH9K_TXDESC_RTSENA; flags |= ATH9K_TXDESC_RTSENA;
} else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
...@@ -1733,8 +1732,6 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len) ...@@ -1733,8 +1732,6 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
!is_pspoll, ctsrate, !is_pspoll, ctsrate,
0, series, 4, flags); 0, series, 4, flags);
if (sc->config.ath_aggr_prot && flags)
ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192);
} }
static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw, static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw,
......
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