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Kirill Smelkov
linux
Commits
cc61c1fe
Commit
cc61c1fe
authored
Jul 12, 2005
by
Ralf Baechle
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MIPS R2 instruction hazard handling.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
bbc7f22f
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arch/mips/mm/c-r4k.c
arch/mips/mm/c-r4k.c
+1
-0
include/asm-mips/hazards.h
include/asm-mips/hazards.h
+16
-0
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arch/mips/mm/c-r4k.c
View file @
cc61c1fe
...
...
@@ -529,6 +529,7 @@ static void r4k_flush_icache_range(unsigned long __user start,
args
.
end
=
end
;
on_each_cpu
(
local_r4k_flush_icache_range
,
&
args
,
1
,
1
);
instruction_hazard
();
}
/*
...
...
include/asm-mips/hazards.h
View file @
cc61c1fe
...
...
@@ -228,6 +228,22 @@ __asm__(
#endif
#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2)
#define instruction_hazard() \
do { \
__label__ __next; \
__asm__ __volatile__( \
" jr.hb %0 \n" \
: \
: "r" (&&__next)); \
__next: \
; \
} while (0)
#else
#define instruction_hazard() do { } while (0)
#endif
#endif
/* __ASSEMBLY__ */
#endif
/* _ASM_HAZARDS_H */
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