Commit cde5c34f authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher

drm/amd/include:cleanup vega10 gc header files.

Cleanup asic_reg/vega10/GC folder.
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 18297a21
......@@ -29,8 +29,8 @@
#include "soc15d.h"
#include "vega10/soc15ip.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "vega10/vega10_enum.h"
#include "hdp/hdp_4_0_offset.h"
......
......@@ -24,9 +24,9 @@
#include "gfxhub_v1_0.h"
#include "vega10/soc15ip.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "vega10/GC/gc_9_0_default.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_default.h"
#include "vega10/vega10_enum.h"
#include "soc15_common.h"
......
......@@ -28,7 +28,7 @@
#include "vega10/soc15ip.h"
#include "hdp/hdp_4_0_offset.h"
#include "hdp/hdp_4_0_sh_mask.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_sh_mask.h"
#include "dce/dce_12_0_offset.h"
#include "dce/dce_12_0_sh_mask.h"
#include "vega10/vega10_enum.h"
......
......@@ -25,8 +25,8 @@
#include "vega10/soc15ip.h"
#include "vega10/NBIO/nbio_6_1_offset.h"
#include "vega10/NBIO/nbio_6_1_sh_mask.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "soc15.h"
#include "vega10_ih.h"
#include "soc15_common.h"
......
......@@ -34,7 +34,7 @@
#include "vega10/soc15ip.h"
#include "mp/mp_9_0_offset.h"
#include "mp/mp_9_0_sh_mask.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "gc/gc_9_0_offset.h"
#include "sdma0/sdma0_4_0_offset.h"
#include "vega10/NBIO/nbio_6_1_offset.h"
......
......@@ -36,8 +36,8 @@
#include "vega10/soc15ip.h"
#include "uvd/uvd_7_0_offset.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "sdma0/sdma0_4_0_offset.h"
#include "sdma1/sdma1_4_0_offset.h"
#include "hdp/hdp_4_0_offset.h"
......
......@@ -31,9 +31,9 @@
#include "asic_reg/mp/mp_9_0_offset.h"
#include "asic_reg/mp/mp_9_0_sh_mask.h"
#include "asic_reg/vega10/GC/gc_9_0_default.h"
#include "asic_reg/vega10/GC/gc_9_0_offset.h"
#include "asic_reg/vega10/GC/gc_9_0_sh_mask.h"
#include "asic_reg/gc/gc_9_0_default.h"
#include "asic_reg/gc/gc_9_0_offset.h"
#include "asic_reg/gc/gc_9_0_sh_mask.h"
#include "asic_reg/vega10/NBIO/nbio_6_1_default.h"
#include "asic_reg/vega10/NBIO/nbio_6_1_offset.h"
......
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