Commit ce62f8ea authored by Liu Ying's avatar Liu Ying Committed by Robert Foss

drm/bridge: imx: Add i.MX93 MIPI DSI support

Freescale i.MX93 SoC embeds a Synopsys Designware MIPI DSI host
controller and a Synopsys Designware MIPI DPHY.  Some configurations
and extensions to them are controlled by i.MX93 media blk-ctrl.

Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
bridge helpers and implementing i.MX93 MIPI DSI specific extensions.
Signed-off-by: default avatarLiu Ying <victor.liu@nxp.com>
Reviewed-by: default avatarRobert Foss <rfoss@kernel.org>
Signed-off-by: default avatarRobert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230821034008.3876938-10-victor.liu@nxp.com
parent db95a55c
......@@ -49,4 +49,15 @@ config DRM_IMX8QXP_PIXEL_LINK_TO_DPI
Choose this to enable pixel link to display pixel interface(PXL2DPI)
found in Freescale i.MX8qxp processor.
config DRM_IMX93_MIPI_DSI
tristate "Freescale i.MX93 specific extensions for Synopsys DW MIPI DSI"
depends on OF
depends on COMMON_CLK
select DRM_DW_MIPI_DSI
select GENERIC_PHY
select GENERIC_PHY_MIPI_DPHY
help
Choose this to enable MIPI DSI controller found in Freescale i.MX93
processor.
endif # ARCH_MXC || COMPILE_TEST
......@@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o
obj-$(CONFIG_DRM_IMX93_MIPI_DSI) += imx93-mipi-dsi.o
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