Skip to content

L
linux
Commit ce87d936 authored by Zhen Lei's avatar Zhen Lei Committed by Shawn Guo
Browse files
Options

arm64: dts: freescale: Separate each group of data in the property 'reg' 

Do not write the 'reg' of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported by reg.yaml.

arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dt.yaml:
 soc: pcie@3400000:reg:0: \
 [0, 54525952, 0, 1048576, 64, 0, 0, 8192] is too long
Signed-off-by: default avatarZhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent dfda1fd1
Hide whitespace changes
Inline Side-by-side
Showing with 69 additions and 69 deletions
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
View file @ ce87d936
...@@ -238,35 +238,35 @@ rtic@60000 { ...@@ -238,35 +238,35 @@ rtic@60000 {
"fsl,sec-v4.0-rtic"; "fsl,sec-v4.0-rtic";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x60000 0x100 0x60e00 0x18>; reg = <0x60000 0x100>, <0x60e00 0x18>;
ranges = <0x0 0x60100 0x500>; ranges = <0x0 0x60100 0x500>;
rtic_a: rtic-a@0 { rtic_a: rtic-a@0 {
compatible = "fsl,sec-v5.4-rtic-memory", compatible = "fsl,sec-v5.4-rtic-memory",
"fsl,sec-v5.0-rtic-memory", "fsl,sec-v5.0-rtic-memory",
"fsl,sec-v4.0-rtic-memory"; "fsl,sec-v4.0-rtic-memory";
reg = <0x00 0x20 0x100 0x100>; reg = <0x00 0x20>, <0x100 0x100>;
}; };
rtic_b: rtic-b@20 { rtic_b: rtic-b@20 {
compatible = "fsl,sec-v5.4-rtic-memory", compatible = "fsl,sec-v5.4-rtic-memory",
"fsl,sec-v5.0-rtic-memory", "fsl,sec-v5.0-rtic-memory",
"fsl,sec-v4.0-rtic-memory"; "fsl,sec-v4.0-rtic-memory";
reg = <0x20 0x20 0x200 0x100>; reg = <0x20 0x20>, <0x200 0x100>;
}; };
rtic_c: rtic-c@40 { rtic_c: rtic-c@40 {
compatible = "fsl,sec-v5.4-rtic-memory", compatible = "fsl,sec-v5.4-rtic-memory",
"fsl,sec-v5.0-rtic-memory", "fsl,sec-v5.0-rtic-memory",
"fsl,sec-v4.0-rtic-memory"; "fsl,sec-v4.0-rtic-memory";
reg = <0x40 0x20 0x300 0x100>; reg = <0x40 0x20>, <0x300 0x100>;
}; };
rtic_d: rtic-d@60 { rtic_d: rtic-d@60 {
compatible = "fsl,sec-v5.4-rtic-memory", compatible = "fsl,sec-v5.4-rtic-memory",
"fsl,sec-v5.0-rtic-memory", "fsl,sec-v5.0-rtic-memory",
"fsl,sec-v4.0-rtic-memory"; "fsl,sec-v4.0-rtic-memory";
reg = <0x60 0x20 0x400 0x100>; reg = <0x60 0x20>, <0x400 0x100>;
}; };
}; };
}; };
...@@ -522,8 +522,8 @@ msi: msi-controller1@1572000 { ...@@ -522,8 +522,8 @@ msi: msi-controller1@1572000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,ls1012a-pcie"; compatible = "fsl,ls1012a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 118 0x4>, /* controller interrupt */ interrupts = <0 118 0x4>, /* controller interrupt */
<0 117 0x4>; /* PME interrupt */ <0 117 0x4>; /* PME interrupt */
......
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View file @ ce87d936
...@@ -617,8 +617,8 @@ sata: sata@3200000 { ...@@ -617,8 +617,8 @@ sata: sata@3200000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,ls1028a-pcie"; compatible = "fsl,ls1028a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x80 0x00000000 0x0 0x00002000>; /* configuration space */ <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
...@@ -644,8 +644,8 @@ pcie1: pcie@3400000 { ...@@ -644,8 +644,8 @@ pcie1: pcie@3400000 {
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
compatible = "fsl,ls1028a-pcie"; compatible = "fsl,ls1028a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x88 0x00000000 0x0 0x00002000>; /* configuration space */ <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
View file @ ce87d936
...@@ -869,8 +869,8 @@ msi3: msi-controller3@1573000 { ...@@ -869,8 +869,8 @@ msi3: msi-controller3@1573000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,ls1043a-pcie"; compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 118 0x4>, /* controller interrupt */ interrupts = <0 118 0x4>, /* controller interrupt */
<0 117 0x4>; /* PME interrupt */ <0 117 0x4>; /* PME interrupt */
...@@ -895,8 +895,8 @@ pcie1: pcie@3400000 { ...@@ -895,8 +895,8 @@ pcie1: pcie@3400000 {
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
compatible = "fsl,ls1043a-pcie"; compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x48 0x00000000 0x0 0x00002000>; /* configuration space */ <0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 128 0x4>, interrupts = <0 128 0x4>,
<0 127 0x4>; <0 127 0x4>;
...@@ -921,8 +921,8 @@ pcie2: pcie@3500000 { ...@@ -921,8 +921,8 @@ pcie2: pcie@3500000 {
pcie3: pcie@3600000 { pcie3: pcie@3600000 {
compatible = "fsl,ls1043a-pcie"; compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x50 0x00000000 0x0 0x00002000>; /* configuration space */ <0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 162 0x4>, interrupts = <0 162 0x4>,
<0 161 0x4>; <0 161 0x4>;
......
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View file @ ce87d936
...@@ -773,8 +773,8 @@ msi3: msi-controller@15a0000 { ...@@ -773,8 +773,8 @@ msi3: msi-controller@15a0000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,ls1046a-pcie"; compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
...@@ -799,8 +799,8 @@ pcie1: pcie@3400000 { ...@@ -799,8 +799,8 @@ pcie1: pcie@3400000 {
pcie_ep1: pcie_ep@3400000 { pcie_ep1: pcie_ep@3400000 {
compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
reg = <0x00 0x03400000 0x0 0x00100000 reg = <0x00 0x03400000 0x0 0x00100000>,
0x40 0x00000000 0x8 0x00000000>; <0x40 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <6>; num-ib-windows = <6>;
num-ob-windows = <8>; num-ob-windows = <8>;
...@@ -809,8 +809,8 @@ pcie_ep1: pcie_ep@3400000 { ...@@ -809,8 +809,8 @@ pcie_ep1: pcie_ep@3400000 {
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
compatible = "fsl,ls1046a-pcie"; compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x48 0x00000000 0x0 0x00002000>; /* configuration space */ <0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
...@@ -835,8 +835,8 @@ pcie2: pcie@3500000 { ...@@ -835,8 +835,8 @@ pcie2: pcie@3500000 {
pcie_ep2: pcie_ep@3500000 { pcie_ep2: pcie_ep@3500000 {
compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
reg = <0x00 0x03500000 0x0 0x00100000 reg = <0x00 0x03500000 0x0 0x00100000>,
0x48 0x00000000 0x8 0x00000000>; <0x48 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <6>; num-ib-windows = <6>;
num-ob-windows = <8>; num-ob-windows = <8>;
...@@ -845,8 +845,8 @@ pcie_ep2: pcie_ep@3500000 { ...@@ -845,8 +845,8 @@ pcie_ep2: pcie_ep@3500000 {
pcie3: pcie@3600000 { pcie3: pcie@3600000 {
compatible = "fsl,ls1046a-pcie"; compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x50 0x00000000 0x0 0x00002000>; /* configuration space */ <0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
...@@ -871,8 +871,8 @@ pcie3: pcie@3600000 { ...@@ -871,8 +871,8 @@ pcie3: pcie@3600000 {
pcie_ep3: pcie_ep@3600000 { pcie_ep3: pcie_ep@3600000 {
compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"; compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
reg = <0x00 0x03600000 0x0 0x00100000 reg = <0x00 0x03600000 0x0 0x00100000>,
0x50 0x00000000 0x8 0x00000000>; <0x50 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <6>; num-ib-windows = <6>;
num-ob-windows = <8>; num-ob-windows = <8>;
......
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View file @ ce87d936
...@@ -536,8 +536,8 @@ sec_jr3: jr@40000 { ...@@ -536,8 +536,8 @@ sec_jr3: jr@40000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,ls1088a-pcie"; compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */ <0x20 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
interrupt-names = "aer"; interrupt-names = "aer";
...@@ -562,8 +562,8 @@ pcie1: pcie@3400000 { ...@@ -562,8 +562,8 @@ pcie1: pcie@3400000 {
pcie_ep1: pcie-ep@3400000 { pcie_ep1: pcie-ep@3400000 {
compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"; compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
reg = <0x00 0x03400000 0x0 0x00100000 reg = <0x00 0x03400000 0x0 0x00100000>,
0x20 0x00000000 0x8 0x00000000>; <0x20 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <24>; num-ib-windows = <24>;
num-ob-windows = <256>; num-ob-windows = <256>;
...@@ -573,8 +573,8 @@ pcie_ep1: pcie-ep@3400000 { ...@@ -573,8 +573,8 @@ pcie_ep1: pcie-ep@3400000 {
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
compatible = "fsl,ls1088a-pcie"; compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */ <0x28 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
interrupt-names = "aer"; interrupt-names = "aer";
...@@ -599,8 +599,8 @@ pcie2: pcie@3500000 { ...@@ -599,8 +599,8 @@ pcie2: pcie@3500000 {
pcie_ep2: pcie-ep@3500000 { pcie_ep2: pcie-ep@3500000 {
compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"; compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
reg = <0x00 0x03500000 0x0 0x00100000 reg = <0x00 0x03500000 0x0 0x00100000>,
0x28 0x00000000 0x8 0x00000000>; <0x28 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <6>; num-ib-windows = <6>;
num-ob-windows = <6>; num-ob-windows = <6>;
...@@ -609,8 +609,8 @@ pcie_ep2: pcie-ep@3500000 { ...@@ -609,8 +609,8 @@ pcie_ep2: pcie-ep@3500000 {
pcie3: pcie@3600000 { pcie3: pcie@3600000 {
compatible = "fsl,ls1088a-pcie"; compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */ <0x30 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config"; reg-names = "regs", "config";
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
interrupt-names = "aer"; interrupt-names = "aer";
...@@ -635,8 +635,8 @@ pcie3: pcie@3600000 { ...@@ -635,8 +635,8 @@ pcie3: pcie@3600000 {
pcie_ep3: pcie-ep@3600000 { pcie_ep3: pcie-ep@3600000 {
compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"; compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
reg = <0x00 0x03600000 0x0 0x00100000 reg = <0x00 0x03600000 0x0 0x00100000>,
0x30 0x00000000 0x8 0x00000000>; <0x30 0x00000000 0x8 0x00000000>;
reg-names = "regs", "addr_space"; reg-names = "regs", "addr_space";
num-ib-windows = <6>; num-ib-windows = <6>;
num-ob-windows = <6>; num-ob-windows = <6>;
......
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
View file @ ce87d936
...@@ -120,32 +120,32 @@ CPU_PW20: cpu-pw20 { ...@@ -120,32 +120,32 @@ CPU_PW20: cpu-pw20 {
}; };
&pcie1 { &pcie1 {
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x10 0x00000000 0x0 0x00002000>; /* configuration space */ <0x10 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
}; };
&pcie2 { &pcie2 {
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x12 0x00000000 0x0 0x00002000>; /* configuration space */ <0x12 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
}; };
&pcie3 { &pcie3 {
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x14 0x00000000 0x0 0x00002000>; /* configuration space */ <0x14 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
}; };
&pcie4 { &pcie4 {
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
0x16 0x00000000 0x0 0x00002000>; /* configuration space */ <0x16 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
......
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
View file @ ce87d936
...@@ -121,8 +121,8 @@ CPU_PW20: cpu-pw20 { ...@@ -121,8 +121,8 @@ CPU_PW20: cpu-pw20 {
&pcie1 { &pcie1 {
compatible = "fsl,ls2088a-pcie"; compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */ <0x20 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000
0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>;
...@@ -130,8 +130,8 @@ &pcie1 { ...@@ -130,8 +130,8 @@ &pcie1 {
&pcie2 { &pcie2 {
compatible = "fsl,ls2088a-pcie"; compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */ <0x28 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000
0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>;
...@@ -139,8 +139,8 @@ &pcie2 { ...@@ -139,8 +139,8 @@ &pcie2 {
&pcie3 { &pcie3 {
compatible = "fsl,ls2088a-pcie"; compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */ <0x30 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000
0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>;
...@@ -148,8 +148,8 @@ &pcie3 { ...@@ -148,8 +148,8 @@ &pcie3 {
&pcie4 { &pcie4 {
compatible = "fsl,ls2088a-pcie"; compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
0x38 0x00000000 0x0 0x00002000>; /* configuration space */ <0x38 0x00000000 0x0 0x00002000>; /* configuration space */
ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000 ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>; 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;
......
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
View file @ ce87d936
...@@ -1089,8 +1089,8 @@ sata3: sata@3230000 { ...@@ -1089,8 +1089,8 @@ sata3: sata@3230000 {
pcie1: pcie@3400000 { pcie1: pcie@3400000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
0x80 0x00000000 0x0 0x00002000>; /* configuration space */ <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
...@@ -1117,8 +1117,8 @@ pcie1: pcie@3400000 { ...@@ -1117,8 +1117,8 @@ pcie1: pcie@3400000 {
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
0x88 0x00000000 0x0 0x00002000>; /* configuration space */ <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
...@@ -1145,8 +1145,8 @@ pcie2: pcie@3500000 { ...@@ -1145,8 +1145,8 @@ pcie2: pcie@3500000 {
pcie3: pcie@3600000 { pcie3: pcie@3600000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
0x90 0x00000000 0x0 0x00002000>; /* configuration space */ <0x90 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
...@@ -1173,8 +1173,8 @@ pcie3: pcie@3600000 { ...@@ -1173,8 +1173,8 @@ pcie3: pcie@3600000 {
pcie4: pcie@3700000 { pcie4: pcie@3700000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
0x98 0x00000000 0x0 0x00002000>; /* configuration space */ <0x98 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
...@@ -1201,8 +1201,8 @@ pcie4: pcie@3700000 { ...@@ -1201,8 +1201,8 @@ pcie4: pcie@3700000 {
pcie5: pcie@3800000 { pcie5: pcie@3800000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */
0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
...@@ -1229,8 +1229,8 @@ pcie5: pcie@3800000 { ...@@ -1229,8 +1229,8 @@ pcie5: pcie@3800000 {
pcie6: pcie@3900000 { pcie6: pcie@3900000 {
compatible = "fsl,lx2160a-pcie"; compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */
0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "csr_axi_slave", "config_axi_slave"; reg-names = "csr_axi_slave", "config_axi_slave";
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7