Commit cf46143f authored by Chris Wilson's avatar Chris Wilson

drm/i915/gt: Replace manual kmap_atomic() with pin_map for renderstate

We only emit the renderstate once now during module load, it is no
longer a concern that we are delaying context creation and so do not
need to so eagerly optimise. Since the last time we have looked at the
renderstate, we have a pin_map / flush_map facility that supports simple
single mappings, replacing the open-coded kmap_atomic() and
prepare_write. As it should be a single page, of which we only write a
small portion, we stick to a simple WB [kmap] and use clflush on !llc
platforms, rather than creating a temporary WC vmapping for the single
page.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200619234543.17499-2-chris@chris-wilson.co.uk
parent 033ef711
...@@ -61,7 +61,7 @@ render_state_get_rodata(const struct intel_engine_cs *engine) ...@@ -61,7 +61,7 @@ render_state_get_rodata(const struct intel_engine_cs *engine)
#define OUT_BATCH(batch, i, val) \ #define OUT_BATCH(batch, i, val) \
do { \ do { \
if ((i) >= PAGE_SIZE / sizeof(u32)) \ if ((i) >= PAGE_SIZE / sizeof(u32)) \
goto err; \ goto out; \
(batch)[(i)++] = (val); \ (batch)[(i)++] = (val); \
} while(0) } while(0)
...@@ -70,15 +70,12 @@ static int render_state_setup(struct intel_renderstate *so, ...@@ -70,15 +70,12 @@ static int render_state_setup(struct intel_renderstate *so,
{ {
const struct intel_renderstate_rodata *rodata = so->rodata; const struct intel_renderstate_rodata *rodata = so->rodata;
unsigned int i = 0, reloc_index = 0; unsigned int i = 0, reloc_index = 0;
unsigned int needs_clflush; int ret = -EINVAL;
u32 *d; u32 *d;
int ret;
ret = i915_gem_object_prepare_write(so->vma->obj, &needs_clflush); d = i915_gem_object_pin_map(so->vma->obj, I915_MAP_WB);
if (ret) if (IS_ERR(d))
return ret; return PTR_ERR(d);
d = kmap_atomic(i915_gem_object_get_dirty_page(so->vma->obj, 0));
while (i < rodata->batch_items) { while (i < rodata->batch_items) {
u32 s = rodata->batch[i]; u32 s = rodata->batch[i];
...@@ -89,7 +86,7 @@ static int render_state_setup(struct intel_renderstate *so, ...@@ -89,7 +86,7 @@ static int render_state_setup(struct intel_renderstate *so,
if (HAS_64BIT_RELOC(i915)) { if (HAS_64BIT_RELOC(i915)) {
if (i + 1 >= rodata->batch_items || if (i + 1 >= rodata->batch_items ||
rodata->batch[i + 1] != 0) rodata->batch[i + 1] != 0)
goto err; goto out;
d[i++] = s; d[i++] = s;
s = upper_32_bits(r); s = upper_32_bits(r);
...@@ -103,7 +100,7 @@ static int render_state_setup(struct intel_renderstate *so, ...@@ -103,7 +100,7 @@ static int render_state_setup(struct intel_renderstate *so,
if (rodata->reloc[reloc_index] != -1) { if (rodata->reloc[reloc_index] != -1) {
drm_err(&i915->drm, "only %d relocs resolved\n", reloc_index); drm_err(&i915->drm, "only %d relocs resolved\n", reloc_index);
goto err; goto out;
} }
so->batch_offset = i915_ggtt_offset(so->vma); so->batch_offset = i915_ggtt_offset(so->vma);
...@@ -150,19 +147,11 @@ static int render_state_setup(struct intel_renderstate *so, ...@@ -150,19 +147,11 @@ static int render_state_setup(struct intel_renderstate *so,
*/ */
so->aux_size = ALIGN(so->aux_size, 8); so->aux_size = ALIGN(so->aux_size, 8);
if (needs_clflush)
drm_clflush_virt_range(d, i * sizeof(u32));
kunmap_atomic(d);
ret = 0; ret = 0;
out: out:
i915_gem_object_finish_access(so->vma->obj); __i915_gem_object_flush_map(so->vma->obj, 0, i * sizeof(u32));
i915_gem_object_unpin_map(so->vma->obj);
return ret; return ret;
err:
kunmap_atomic(d);
ret = -EINVAL;
goto out;
} }
#undef OUT_BATCH #undef OUT_BATCH
......
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