Commit cfa77728 authored by Jani Nikula's avatar Jani Nikula

drm/i915/pciids: switch to xe driver style PCI ID macros

The PCI ID macros in xe_pciids.h allow passing in the macro to operate
on each PCI ID, making it more flexible. Convert i915_pciids.h to the
same pattern.

INTEL_IVB_Q_IDS() for Quanta transcode remains a special case, and
unconditionally uses INTEL_QUANTA_VGA_DEVICE().

Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240515165651.1230465-1-jani.nikula@intel.comSigned-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent a568ff8c
......@@ -518,46 +518,46 @@ static const struct intel_early_ops gen11_early_ops __initconst = {
/* Intel integrated GPUs for which we need to reserve "stolen memory" */
static const struct pci_device_id intel_early_ids[] __initconst = {
INTEL_I830_IDS(&i830_early_ops),
INTEL_I845G_IDS(&i845_early_ops),
INTEL_I85X_IDS(&i85x_early_ops),
INTEL_I865G_IDS(&i865_early_ops),
INTEL_I915G_IDS(&gen3_early_ops),
INTEL_I915GM_IDS(&gen3_early_ops),
INTEL_I945G_IDS(&gen3_early_ops),
INTEL_I945GM_IDS(&gen3_early_ops),
INTEL_VLV_IDS(&gen6_early_ops),
INTEL_PNV_IDS(&gen3_early_ops),
INTEL_I965G_IDS(&gen3_early_ops),
INTEL_G33_IDS(&gen3_early_ops),
INTEL_I965GM_IDS(&gen3_early_ops),
INTEL_GM45_IDS(&gen3_early_ops),
INTEL_G45_IDS(&gen3_early_ops),
INTEL_ILK_IDS(&gen3_early_ops),
INTEL_SNB_IDS(&gen6_early_ops),
INTEL_IVB_IDS(&gen6_early_ops),
INTEL_HSW_IDS(&gen6_early_ops),
INTEL_BDW_IDS(&gen8_early_ops),
INTEL_CHV_IDS(&chv_early_ops),
INTEL_SKL_IDS(&gen9_early_ops),
INTEL_BXT_IDS(&gen9_early_ops),
INTEL_KBL_IDS(&gen9_early_ops),
INTEL_CFL_IDS(&gen9_early_ops),
INTEL_WHL_IDS(&gen9_early_ops),
INTEL_CML_IDS(&gen9_early_ops),
INTEL_GLK_IDS(&gen9_early_ops),
INTEL_CNL_IDS(&gen9_early_ops),
INTEL_ICL_IDS(&gen11_early_ops),
INTEL_EHL_IDS(&gen11_early_ops),
INTEL_JSL_IDS(&gen11_early_ops),
INTEL_TGL_IDS(&gen11_early_ops),
INTEL_RKL_IDS(&gen11_early_ops),
INTEL_ADLS_IDS(&gen11_early_ops),
INTEL_ADLP_IDS(&gen11_early_ops),
INTEL_ADLN_IDS(&gen11_early_ops),
INTEL_RPLS_IDS(&gen11_early_ops),
INTEL_RPLU_IDS(&gen11_early_ops),
INTEL_RPLP_IDS(&gen11_early_ops),
INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_early_ops),
INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845_early_ops),
INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_early_ops),
INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865_early_ops),
INTEL_I915G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_I945G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_VLV_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
INTEL_PNV_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_I965G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_G33_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_G45_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_ILK_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
INTEL_SNB_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
INTEL_IVB_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
INTEL_HSW_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
INTEL_BDW_IDS(INTEL_VGA_DEVICE, &gen8_early_ops),
INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_early_ops),
INTEL_SKL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_BXT_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_KBL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_CFL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_WHL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_CML_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_GLK_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_CNL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
INTEL_ICL_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_EHL_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_JSL_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_TGL_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_RKL_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &gen11_early_ops),
};
struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0, 0);
......
......@@ -788,7 +788,7 @@ __diag_pop();
static bool has_no_display(struct pci_dev *pdev)
{
static const struct pci_device_id ids[] = {
INTEL_IVB_Q_IDS(0),
INTEL_IVB_Q_IDS(INTEL_VGA_DEVICE, 0),
{}
};
......@@ -802,48 +802,48 @@ static const struct {
u32 devid;
const struct intel_display_device_info *info;
} intel_display_ids[] = {
INTEL_I830_IDS(&i830_display),
INTEL_I845G_IDS(&i845_display),
INTEL_I85X_IDS(&i85x_display),
INTEL_I865G_IDS(&i865g_display),
INTEL_I915G_IDS(&i915g_display),
INTEL_I915GM_IDS(&i915gm_display),
INTEL_I945G_IDS(&i945g_display),
INTEL_I945GM_IDS(&i945gm_display),
INTEL_I965G_IDS(&i965g_display),
INTEL_G33_IDS(&g33_display),
INTEL_I965GM_IDS(&i965gm_display),
INTEL_GM45_IDS(&gm45_display),
INTEL_G45_IDS(&g45_display),
INTEL_PNV_IDS(&pnv_display),
INTEL_ILK_D_IDS(&ilk_d_display),
INTEL_ILK_M_IDS(&ilk_m_display),
INTEL_SNB_IDS(&snb_display),
INTEL_IVB_IDS(&ivb_display),
INTEL_HSW_IDS(&hsw_display),
INTEL_VLV_IDS(&vlv_display),
INTEL_BDW_IDS(&bdw_display),
INTEL_CHV_IDS(&chv_display),
INTEL_SKL_IDS(&skl_display),
INTEL_BXT_IDS(&bxt_display),
INTEL_GLK_IDS(&glk_display),
INTEL_KBL_IDS(&skl_display),
INTEL_CFL_IDS(&skl_display),
INTEL_WHL_IDS(&skl_display),
INTEL_CML_IDS(&skl_display),
INTEL_ICL_IDS(&icl_display),
INTEL_EHL_IDS(&jsl_ehl_display),
INTEL_JSL_IDS(&jsl_ehl_display),
INTEL_TGL_IDS(&tgl_display),
INTEL_DG1_IDS(&dg1_display),
INTEL_RKL_IDS(&rkl_display),
INTEL_ADLS_IDS(&adl_s_display),
INTEL_RPLS_IDS(&adl_s_display),
INTEL_ADLP_IDS(&xe_lpd_display),
INTEL_ADLN_IDS(&xe_lpd_display),
INTEL_RPLU_IDS(&xe_lpd_display),
INTEL_RPLP_IDS(&xe_lpd_display),
INTEL_DG2_IDS(&xe_hpd_display),
INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_display),
INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845_display),
INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_display),
INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865g_display),
INTEL_I915G_IDS(INTEL_VGA_DEVICE, &i915g_display),
INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &i915gm_display),
INTEL_I945G_IDS(INTEL_VGA_DEVICE, &i945g_display),
INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &i945gm_display),
INTEL_I965G_IDS(INTEL_VGA_DEVICE, &i965g_display),
INTEL_G33_IDS(INTEL_VGA_DEVICE, &g33_display),
INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &i965gm_display),
INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gm45_display),
INTEL_G45_IDS(INTEL_VGA_DEVICE, &g45_display),
INTEL_PNV_IDS(INTEL_VGA_DEVICE, &pnv_display),
INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &ilk_d_display),
INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &ilk_m_display),
INTEL_SNB_IDS(INTEL_VGA_DEVICE, &snb_display),
INTEL_IVB_IDS(INTEL_VGA_DEVICE, &ivb_display),
INTEL_HSW_IDS(INTEL_VGA_DEVICE, &hsw_display),
INTEL_VLV_IDS(INTEL_VGA_DEVICE, &vlv_display),
INTEL_BDW_IDS(INTEL_VGA_DEVICE, &bdw_display),
INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_display),
INTEL_SKL_IDS(INTEL_VGA_DEVICE, &skl_display),
INTEL_BXT_IDS(INTEL_VGA_DEVICE, &bxt_display),
INTEL_GLK_IDS(INTEL_VGA_DEVICE, &glk_display),
INTEL_KBL_IDS(INTEL_VGA_DEVICE, &skl_display),
INTEL_CFL_IDS(INTEL_VGA_DEVICE, &skl_display),
INTEL_WHL_IDS(INTEL_VGA_DEVICE, &skl_display),
INTEL_CML_IDS(INTEL_VGA_DEVICE, &skl_display),
INTEL_ICL_IDS(INTEL_VGA_DEVICE, &icl_display),
INTEL_EHL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
INTEL_JSL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
INTEL_TGL_IDS(INTEL_VGA_DEVICE, &tgl_display),
INTEL_DG1_IDS(INTEL_VGA_DEVICE, &dg1_display),
INTEL_RKL_IDS(INTEL_VGA_DEVICE, &rkl_display),
INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
INTEL_DG2_IDS(INTEL_VGA_DEVICE, &xe_hpd_display),
/*
* Do not add any GMD_ID-based platforms to this list. They will
......
......@@ -797,81 +797,81 @@ __diag_pop();
* PCI ID matches, otherwise we'll use the wrong info struct above.
*/
static const struct pci_device_id pciidlist[] = {
INTEL_I830_IDS(&i830_info),
INTEL_I845G_IDS(&i845g_info),
INTEL_I85X_IDS(&i85x_info),
INTEL_I865G_IDS(&i865g_info),
INTEL_I915G_IDS(&i915g_info),
INTEL_I915GM_IDS(&i915gm_info),
INTEL_I945G_IDS(&i945g_info),
INTEL_I945GM_IDS(&i945gm_info),
INTEL_I965G_IDS(&i965g_info),
INTEL_G33_IDS(&g33_info),
INTEL_I965GM_IDS(&i965gm_info),
INTEL_GM45_IDS(&gm45_info),
INTEL_G45_IDS(&g45_info),
INTEL_PNV_G_IDS(&pnv_g_info),
INTEL_PNV_M_IDS(&pnv_m_info),
INTEL_ILK_D_IDS(&ilk_d_info),
INTEL_ILK_M_IDS(&ilk_m_info),
INTEL_SNB_D_GT1_IDS(&snb_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&snb_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&snb_m_gt1_info),
INTEL_SNB_M_GT2_IDS(&snb_m_gt2_info),
INTEL_IVB_Q_IDS(&ivb_q_info), /* must be first IVB */
INTEL_IVB_M_GT1_IDS(&ivb_m_gt1_info),
INTEL_IVB_M_GT2_IDS(&ivb_m_gt2_info),
INTEL_IVB_D_GT1_IDS(&ivb_d_gt1_info),
INTEL_IVB_D_GT2_IDS(&ivb_d_gt2_info),
INTEL_HSW_GT1_IDS(&hsw_gt1_info),
INTEL_HSW_GT2_IDS(&hsw_gt2_info),
INTEL_HSW_GT3_IDS(&hsw_gt3_info),
INTEL_VLV_IDS(&vlv_info),
INTEL_BDW_GT1_IDS(&bdw_gt1_info),
INTEL_BDW_GT2_IDS(&bdw_gt2_info),
INTEL_BDW_GT3_IDS(&bdw_gt3_info),
INTEL_BDW_RSVD_IDS(&bdw_rsvd_info),
INTEL_CHV_IDS(&chv_info),
INTEL_SKL_GT1_IDS(&skl_gt1_info),
INTEL_SKL_GT2_IDS(&skl_gt2_info),
INTEL_SKL_GT3_IDS(&skl_gt3_info),
INTEL_SKL_GT4_IDS(&skl_gt4_info),
INTEL_BXT_IDS(&bxt_info),
INTEL_GLK_IDS(&glk_info),
INTEL_KBL_GT1_IDS(&kbl_gt1_info),
INTEL_KBL_GT2_IDS(&kbl_gt2_info),
INTEL_KBL_GT3_IDS(&kbl_gt3_info),
INTEL_KBL_GT4_IDS(&kbl_gt3_info),
INTEL_AML_KBL_GT2_IDS(&kbl_gt2_info),
INTEL_CFL_S_GT1_IDS(&cfl_gt1_info),
INTEL_CFL_S_GT2_IDS(&cfl_gt2_info),
INTEL_CFL_H_GT1_IDS(&cfl_gt1_info),
INTEL_CFL_H_GT2_IDS(&cfl_gt2_info),
INTEL_CFL_U_GT2_IDS(&cfl_gt2_info),
INTEL_CFL_U_GT3_IDS(&cfl_gt3_info),
INTEL_WHL_U_GT1_IDS(&cfl_gt1_info),
INTEL_WHL_U_GT2_IDS(&cfl_gt2_info),
INTEL_AML_CFL_GT2_IDS(&cfl_gt2_info),
INTEL_WHL_U_GT3_IDS(&cfl_gt3_info),
INTEL_CML_GT1_IDS(&cml_gt1_info),
INTEL_CML_GT2_IDS(&cml_gt2_info),
INTEL_CML_U_GT1_IDS(&cml_gt1_info),
INTEL_CML_U_GT2_IDS(&cml_gt2_info),
INTEL_ICL_IDS(&icl_info),
INTEL_EHL_IDS(&ehl_info),
INTEL_JSL_IDS(&jsl_info),
INTEL_TGL_IDS(&tgl_info),
INTEL_RKL_IDS(&rkl_info),
INTEL_ADLS_IDS(&adl_s_info),
INTEL_ADLP_IDS(&adl_p_info),
INTEL_ADLN_IDS(&adl_p_info),
INTEL_DG1_IDS(&dg1_info),
INTEL_RPLS_IDS(&adl_s_info),
INTEL_RPLU_IDS(&adl_p_info),
INTEL_RPLP_IDS(&adl_p_info),
INTEL_DG2_IDS(&dg2_info),
INTEL_ATS_M_IDS(&ats_m_info),
INTEL_MTL_IDS(&mtl_info),
INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_info),
INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845g_info),
INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_info),
INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865g_info),
INTEL_I915G_IDS(INTEL_VGA_DEVICE, &i915g_info),
INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &i915gm_info),
INTEL_I945G_IDS(INTEL_VGA_DEVICE, &i945g_info),
INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &i945gm_info),
INTEL_I965G_IDS(INTEL_VGA_DEVICE, &i965g_info),
INTEL_G33_IDS(INTEL_VGA_DEVICE, &g33_info),
INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &i965gm_info),
INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gm45_info),
INTEL_G45_IDS(INTEL_VGA_DEVICE, &g45_info),
INTEL_PNV_G_IDS(INTEL_VGA_DEVICE, &pnv_g_info),
INTEL_PNV_M_IDS(INTEL_VGA_DEVICE, &pnv_m_info),
INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &ilk_d_info),
INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &ilk_m_info),
INTEL_SNB_D_GT1_IDS(INTEL_VGA_DEVICE, &snb_d_gt1_info),
INTEL_SNB_D_GT2_IDS(INTEL_VGA_DEVICE, &snb_d_gt2_info),
INTEL_SNB_M_GT1_IDS(INTEL_VGA_DEVICE, &snb_m_gt1_info),
INTEL_SNB_M_GT2_IDS(INTEL_VGA_DEVICE, &snb_m_gt2_info),
INTEL_IVB_Q_IDS(INTEL_VGA_DEVICE, &ivb_q_info), /* must be first IVB */
INTEL_IVB_M_GT1_IDS(INTEL_VGA_DEVICE, &ivb_m_gt1_info),
INTEL_IVB_M_GT2_IDS(INTEL_VGA_DEVICE, &ivb_m_gt2_info),
INTEL_IVB_D_GT1_IDS(INTEL_VGA_DEVICE, &ivb_d_gt1_info),
INTEL_IVB_D_GT2_IDS(INTEL_VGA_DEVICE, &ivb_d_gt2_info),
INTEL_HSW_GT1_IDS(INTEL_VGA_DEVICE, &hsw_gt1_info),
INTEL_HSW_GT2_IDS(INTEL_VGA_DEVICE, &hsw_gt2_info),
INTEL_HSW_GT3_IDS(INTEL_VGA_DEVICE, &hsw_gt3_info),
INTEL_VLV_IDS(INTEL_VGA_DEVICE, &vlv_info),
INTEL_BDW_GT1_IDS(INTEL_VGA_DEVICE, &bdw_gt1_info),
INTEL_BDW_GT2_IDS(INTEL_VGA_DEVICE, &bdw_gt2_info),
INTEL_BDW_GT3_IDS(INTEL_VGA_DEVICE, &bdw_gt3_info),
INTEL_BDW_RSVD_IDS(INTEL_VGA_DEVICE, &bdw_rsvd_info),
INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_info),
INTEL_SKL_GT1_IDS(INTEL_VGA_DEVICE, &skl_gt1_info),
INTEL_SKL_GT2_IDS(INTEL_VGA_DEVICE, &skl_gt2_info),
INTEL_SKL_GT3_IDS(INTEL_VGA_DEVICE, &skl_gt3_info),
INTEL_SKL_GT4_IDS(INTEL_VGA_DEVICE, &skl_gt4_info),
INTEL_BXT_IDS(INTEL_VGA_DEVICE, &bxt_info),
INTEL_GLK_IDS(INTEL_VGA_DEVICE, &glk_info),
INTEL_KBL_GT1_IDS(INTEL_VGA_DEVICE, &kbl_gt1_info),
INTEL_KBL_GT2_IDS(INTEL_VGA_DEVICE, &kbl_gt2_info),
INTEL_KBL_GT3_IDS(INTEL_VGA_DEVICE, &kbl_gt3_info),
INTEL_KBL_GT4_IDS(INTEL_VGA_DEVICE, &kbl_gt3_info),
INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, &kbl_gt2_info),
INTEL_CFL_S_GT1_IDS(INTEL_VGA_DEVICE, &cfl_gt1_info),
INTEL_CFL_S_GT2_IDS(INTEL_VGA_DEVICE, &cfl_gt2_info),
INTEL_CFL_H_GT1_IDS(INTEL_VGA_DEVICE, &cfl_gt1_info),
INTEL_CFL_H_GT2_IDS(INTEL_VGA_DEVICE, &cfl_gt2_info),
INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, &cfl_gt2_info),
INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, &cfl_gt3_info),
INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, &cfl_gt1_info),
INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, &cfl_gt2_info),
INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, &cfl_gt2_info),
INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, &cfl_gt3_info),
INTEL_CML_GT1_IDS(INTEL_VGA_DEVICE, &cml_gt1_info),
INTEL_CML_GT2_IDS(INTEL_VGA_DEVICE, &cml_gt2_info),
INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, &cml_gt1_info),
INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, &cml_gt2_info),
INTEL_ICL_IDS(INTEL_VGA_DEVICE, &icl_info),
INTEL_EHL_IDS(INTEL_VGA_DEVICE, &ehl_info),
INTEL_JSL_IDS(INTEL_VGA_DEVICE, &jsl_info),
INTEL_TGL_IDS(INTEL_VGA_DEVICE, &tgl_info),
INTEL_RKL_IDS(INTEL_VGA_DEVICE, &rkl_info),
INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_info),
INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &adl_p_info),
INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &adl_p_info),
INTEL_DG1_IDS(INTEL_VGA_DEVICE, &dg1_info),
INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_info),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &adl_p_info),
INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &adl_p_info),
INTEL_DG2_IDS(INTEL_VGA_DEVICE, &dg2_info),
INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_info),
INTEL_MTL_IDS(INTEL_VGA_DEVICE, &mtl_info),
{}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
......
......@@ -131,77 +131,77 @@ void intel_device_info_print(const struct intel_device_info *info,
#define INTEL_VGA_DEVICE(id, info) (id)
static const u16 subplatform_ult_ids[] = {
INTEL_HSW_ULT_GT1_IDS(0),
INTEL_HSW_ULT_GT2_IDS(0),
INTEL_HSW_ULT_GT3_IDS(0),
INTEL_BDW_ULT_GT1_IDS(0),
INTEL_BDW_ULT_GT2_IDS(0),
INTEL_BDW_ULT_GT3_IDS(0),
INTEL_BDW_ULT_RSVD_IDS(0),
INTEL_SKL_ULT_GT1_IDS(0),
INTEL_SKL_ULT_GT2_IDS(0),
INTEL_SKL_ULT_GT3_IDS(0),
INTEL_KBL_ULT_GT1_IDS(0),
INTEL_KBL_ULT_GT2_IDS(0),
INTEL_KBL_ULT_GT3_IDS(0),
INTEL_CFL_U_GT2_IDS(0),
INTEL_CFL_U_GT3_IDS(0),
INTEL_WHL_U_GT1_IDS(0),
INTEL_WHL_U_GT2_IDS(0),
INTEL_WHL_U_GT3_IDS(0),
INTEL_CML_U_GT1_IDS(0),
INTEL_CML_U_GT2_IDS(0),
INTEL_HSW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_HSW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_HSW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULT_RSVD_IDS(INTEL_VGA_DEVICE, 0),
INTEL_SKL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_SKL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_SKL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_KBL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_KBL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_KBL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_ulx_ids[] = {
INTEL_HSW_ULX_GT1_IDS(0),
INTEL_HSW_ULX_GT2_IDS(0),
INTEL_BDW_ULX_GT1_IDS(0),
INTEL_BDW_ULX_GT2_IDS(0),
INTEL_BDW_ULX_GT3_IDS(0),
INTEL_BDW_ULX_RSVD_IDS(0),
INTEL_SKL_ULX_GT1_IDS(0),
INTEL_SKL_ULX_GT2_IDS(0),
INTEL_KBL_ULX_GT1_IDS(0),
INTEL_KBL_ULX_GT2_IDS(0),
INTEL_AML_KBL_GT2_IDS(0),
INTEL_AML_CFL_GT2_IDS(0),
INTEL_HSW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_HSW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULX_GT3_IDS(INTEL_VGA_DEVICE, 0),
INTEL_BDW_ULX_RSVD_IDS(INTEL_VGA_DEVICE, 0),
INTEL_SKL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_SKL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_KBL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
INTEL_KBL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, 0),
INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_portf_ids[] = {
INTEL_ICL_PORT_F_IDS(0),
INTEL_ICL_PORT_F_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_uy_ids[] = {
INTEL_TGL_GT2_IDS(0),
INTEL_TGL_GT2_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_n_ids[] = {
INTEL_ADLN_IDS(0),
INTEL_ADLN_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_rpl_ids[] = {
INTEL_RPLS_IDS(0),
INTEL_RPLU_IDS(0),
INTEL_RPLP_IDS(0),
INTEL_RPLS_IDS(INTEL_VGA_DEVICE, 0),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
INTEL_RPLP_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_rplu_ids[] = {
INTEL_RPLU_IDS(0),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_g10_ids[] = {
INTEL_DG2_G10_IDS(0),
INTEL_ATS_M150_IDS(0),
INTEL_DG2_G10_IDS(INTEL_VGA_DEVICE, 0),
INTEL_ATS_M150_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_g11_ids[] = {
INTEL_DG2_G11_IDS(0),
INTEL_ATS_M75_IDS(0),
INTEL_DG2_G11_IDS(INTEL_VGA_DEVICE, 0),
INTEL_ATS_M75_IDS(INTEL_VGA_DEVICE, 0),
};
static const u16 subplatform_g12_ids[] = {
INTEL_DG2_G12_IDS(0),
INTEL_DG2_G12_IDS(INTEL_VGA_DEVICE, 0),
};
static bool find_devid(u16 id, const u16 *p, unsigned int num)
......
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