Commit d0cc3d41 authored by Martin Fuzzey's avatar Martin Fuzzey Committed by Greg Kroah-Hartman

USB: imx21-hcd accept arbitary transfer buffer alignement.

The hardware can only do DMA to 4 byte aligned addresses.
When this requirement is not met use PIO or a bounce buffer.

PIO is used when the buffer is small enough to directly
use the hardware data memory (2*maxpacket).

A bounce buffer is used for larger transfers.
Signed-off-by: default avatarMartin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 1dae423d
This diff is collapsed.
...@@ -250,6 +250,7 @@ ...@@ -250,6 +250,7 @@
#define USBCTRL_USB_BYP (1 << 2) #define USBCTRL_USB_BYP (1 << 2)
#define USBCTRL_HOST1_TXEN_OE (1 << 1) #define USBCTRL_HOST1_TXEN_OE (1 << 1)
#define USBOTG_DMEM 0x1000
/* Values in TD blocks */ /* Values in TD blocks */
#define TD_DIR_SETUP 0 #define TD_DIR_SETUP 0
...@@ -346,8 +347,8 @@ struct td { ...@@ -346,8 +347,8 @@ struct td {
struct list_head list; struct list_head list;
struct urb *urb; struct urb *urb;
struct usb_host_endpoint *ep; struct usb_host_endpoint *ep;
dma_addr_t data; dma_addr_t dma_handle;
unsigned long buf_addr; void *cpu_buffer;
int len; int len;
int frame; int frame;
int isoc_index; int isoc_index;
...@@ -360,6 +361,8 @@ struct etd_priv { ...@@ -360,6 +361,8 @@ struct etd_priv {
struct td *td; struct td *td;
struct list_head queue; struct list_head queue;
dma_addr_t dma_handle; dma_addr_t dma_handle;
void *cpu_buffer;
void *bounce_buffer;
int alloc; int alloc;
int len; int len;
int dmem_size; int dmem_size;
...@@ -412,6 +415,7 @@ struct debug_isoc_trace { ...@@ -412,6 +415,7 @@ struct debug_isoc_trace {
struct imx21 { struct imx21 {
spinlock_t lock; spinlock_t lock;
struct device *dev; struct device *dev;
struct usb_hcd *hcd;
struct mx21_usbh_platform_data *pdata; struct mx21_usbh_platform_data *pdata;
struct list_head dmem_list; struct list_head dmem_list;
struct list_head queue_for_etd; /* eps queued due to etd shortage */ struct list_head queue_for_etd; /* eps queued due to etd shortage */
......
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