Commit d1ba2b36 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

ARM: dts: nuvoton: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220407143127.295008-1-krzysztof.kozlowski@linaro.org
parent c9bdd50d
......@@ -358,7 +358,7 @@ &fiu0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0cs1_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -406,7 +406,7 @@ &fiu3 {
pinctrl-0 = <&spi3_pins>, <&spi3cs1_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -416,7 +416,7 @@ spi-nor@0 {
m25p,fast-read;
label = "pnor";
};
spi-nor@1 {
flash@1 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -135,7 +135,7 @@ &fiu0 {
pinctrl-0 = <&spi0cs1_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -380,7 +380,7 @@ &fiu0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0cs1_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -415,7 +415,7 @@ rwfs@3d00000 {
};
};
};
spi-nor@1 {
flash@1 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -440,7 +440,7 @@ spare2@800000 {
&fiu3 {
pinctrl-0 = <&spi3_pins>;
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......
......@@ -67,7 +67,7 @@ &ehci1 {
&fiu0 {
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -128,7 +128,7 @@ spare4@1300000 {
&fiu3 {
pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -324,7 +324,7 @@ fan@7 {
&spi0 {
cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
status = "okay";
Flash@0 {
flash@0 {
compatible = "winbond,w25q128",
"jedec,spi-nor";
reg = <0x0>;
......@@ -345,7 +345,7 @@ partition@1 {
&spi1 {
cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
status = "okay";
Flash@0 {
flash@0 {
compatible = "winbond,w25q128fw",
"jedec,spi-nor";
reg = <0x0>;
......
......@@ -100,7 +100,7 @@ &fiu0 {
pinctrl-0 = <&spi0cs1_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -139,7 +139,7 @@ rwfs@1d00000 {
};
};
spi-nor@1 {
flash@1 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......@@ -166,7 +166,7 @@ &fiu3 {
pinctrl-0 = <&spi3_pins>;
status = "okay";
spi-nor@0 {
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......
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